1 ##===- lib/Target/X86/Makefile -----------------------------*- Makefile -*-===##
3 # The LLVM Compiler Infrastructure
5 # This file was developed by the LLVM research group and is distributed under
6 # the University of Illinois Open Source License. See LICENSE.TXT for details.
8 ##===----------------------------------------------------------------------===##
11 include $(LEVEL)/Makefile.common
15 # Make sure that tblgen is run, first thing.
16 $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
17 X86GenRegisterInfo.inc X86GenInstrNames.inc \
18 X86GenInstrInfo.inc X86GenATTAsmWriter.inc \
19 X86GenIntelAsmWriter.inc
21 TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
22 $(SourceDir)/../Target.td
24 $(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
25 @echo "Building $(TARGET).td register names with tblgen"
26 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
28 $(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
29 @echo "Building $(TARGET).td register information header with tblgen"
30 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
32 $(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
33 @echo "Building $(TARGET).td register info implementation with tblgen"
34 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
36 $(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
37 @echo "Building $(TARGET).td instruction names with tblgen"
38 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
40 $(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
41 @echo "Building $(TARGET).td instruction information with tblgen"
42 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
44 $(TARGET)GenATTAsmWriter.inc:: $(TDFILES) $(TBLGEN)
45 @echo "Building $(TARGET).td AT&T assembly writer with tblgen"
46 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@
48 $(TARGET)GenIntelAsmWriter.inc:: $(TDFILES) $(TBLGEN)
49 @echo "Building $(TARGET).td Intel assembly writer with tblgen"
50 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -asmwriternum=1 -o $@
52 #$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
53 # @echo "Building $(TARGET).td instruction selector with tblgen"
54 # $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@