1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86ATTAsmPrinter.h"
18 #include "X86TargetMachine.h"
19 #include "llvm/Module.h"
20 #include "llvm/Support/Mangler.h"
21 #include "llvm/Target/TargetOptions.h"
25 /// runOnMachineFunction - This uses the printMachineInstruction()
26 /// method to print assembly for each instruction.
28 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
30 // Let PassManager know we need debug information and relay
31 // the MachineDebugInfo address on to DwarfWriter.
32 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
35 SetupMachineFunction(MF);
38 // Print out constants referenced by the function
39 EmitConstantPool(MF.getConstantPool());
41 // Print out jump tables referenced by the function
42 EmitJumpTableInfo(MF.getJumpTableInfo());
44 // Print out labels for the function.
45 const Function *F = MF.getFunction();
46 switch (F->getLinkage()) {
47 default: assert(0 && "Unknown linkage type!");
48 case Function::InternalLinkage: // Symbols default to internal.
49 SwitchSection(".text", F);
50 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
52 case Function::ExternalLinkage:
53 SwitchSection(".text", F);
54 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
55 O << "\t.globl\t" << CurrentFnName << "\n";
57 case Function::WeakLinkage:
58 case Function::LinkOnceLinkage:
60 SwitchSection(".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
62 O << "\t.globl\t" << CurrentFnName << "\n";
63 O << "\t.weak_definition\t" << CurrentFnName << "\n";
65 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
66 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
67 << ",\"ax\",@progbits\n";
68 O << "\t.weak " << CurrentFnName << "\n";
72 O << CurrentFnName << ":\n";
75 // Emit pre-function debug information.
76 DW.BeginFunction(&MF);
79 // Print out code for the function.
80 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
82 // Print a label for the basic block.
83 if (I->pred_begin() != I->pred_end()) {
84 printBasicBlockLabel(I, true);
87 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
89 // Print the assembly for the instruction.
91 printMachineInstruction(II);
94 if (HasDotTypeDotSizeDirective)
95 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
98 // Emit post-function debug information.
102 // We didn't modify anything.
106 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
107 const char *Modifier) {
108 const MachineOperand &MO = MI->getOperand(OpNo);
109 const MRegisterInfo &RI = *TM.getRegisterInfo();
110 switch (MO.getType()) {
111 case MachineOperand::MO_Register: {
112 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
113 "Virtual registers should not make it this far!");
115 unsigned Reg = MO.getReg();
116 if (Modifier && strncmp(Modifier, "trunc", strlen("trunc")) == 0) {
117 MVT::ValueType VT = (strcmp(Modifier,"trunc16") == 0)
118 ? MVT::i16 : MVT::i8;
119 Reg = getX86SubSuperRegister(Reg, VT);
121 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
122 O << (char)tolower(*Name);
126 case MachineOperand::MO_Immediate:
127 if (!Modifier || strcmp(Modifier, "debug") != 0)
129 O << (int)MO.getImmedValue();
131 case MachineOperand::MO_MachineBasicBlock:
132 printBasicBlockLabel(MO.getMachineBasicBlock());
134 case MachineOperand::MO_JumpTableIndex: {
135 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
136 if (!isMemOp) O << '$';
137 O << PrivateGlobalPrefix << "JTI" << getFunctionNumber() << "_"
138 << MO.getJumpTableIndex();
139 // FIXME: PIC relocation model
142 case MachineOperand::MO_ConstantPoolIndex: {
143 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
144 if (!isMemOp) O << '$';
145 O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
146 << MO.getConstantPoolIndex();
147 if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
148 O << "-\"L" << getFunctionNumber() << "$pb\"";
149 int Offset = MO.getOffset();
156 case MachineOperand::MO_GlobalAddress: {
157 bool isCallOp = Modifier && !strcmp(Modifier, "call");
158 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
159 if (!isMemOp && !isCallOp) O << '$';
160 // Darwin block shameless ripped from PPCAsmPrinter.cpp
161 if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
162 GlobalValue *GV = MO.getGlobal();
163 std::string Name = Mang->getValueName(GV);
164 // Link-once, External, or Weakly-linked global variables need
165 // non-lazily-resolved stubs
166 if (GV->isExternal() || GV->hasWeakLinkage() ||
167 GV->hasLinkOnceLinkage()) {
168 // Dynamically-resolved functions need a stub for the function.
169 if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
170 FnStubs.insert(Name);
171 O << "L" << Name << "$stub";
173 GVStubs.insert(Name);
174 O << "L" << Name << "$non_lazy_ptr";
177 O << Mang->getValueName(GV);
179 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC)
180 O << "-\"L" << getFunctionNumber() << "$pb\"";
182 O << Mang->getValueName(MO.getGlobal());
183 int Offset = MO.getOffset();
190 case MachineOperand::MO_ExternalSymbol: {
191 bool isCallOp = Modifier && !strcmp(Modifier, "call");
192 if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
193 std::string Name(GlobalPrefix);
194 Name += MO.getSymbolName();
195 FnStubs.insert(Name);
196 O << "L" << Name << "$stub";
199 if (!isCallOp) O << '$';
200 O << GlobalPrefix << MO.getSymbolName();
204 O << "<unknown operand type>"; return;
208 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
209 unsigned char value = MI->getOperand(Op).getImmedValue();
210 assert(value <= 7 && "Invalid ssecc argument!");
212 case 0: O << "eq"; break;
213 case 1: O << "lt"; break;
214 case 2: O << "le"; break;
215 case 3: O << "unord"; break;
216 case 4: O << "neq"; break;
217 case 5: O << "nlt"; break;
218 case 6: O << "nle"; break;
219 case 7: O << "ord"; break;
223 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
224 assert(isMem(MI, Op) && "Invalid memory reference!");
226 const MachineOperand &BaseReg = MI->getOperand(Op);
227 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
228 const MachineOperand &IndexReg = MI->getOperand(Op+2);
229 const MachineOperand &DispSpec = MI->getOperand(Op+3);
231 if (BaseReg.isFrameIndex()) {
232 O << "[frame slot #" << BaseReg.getFrameIndex();
233 if (DispSpec.getImmedValue())
234 O << " + " << DispSpec.getImmedValue();
239 if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
240 printOperand(MI, Op+3, "mem");
242 int DispVal = DispSpec.getImmedValue();
243 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
247 if (IndexReg.getReg() || BaseReg.getReg()) {
249 if (BaseReg.getReg())
250 printOperand(MI, Op);
252 if (IndexReg.getReg()) {
254 printOperand(MI, Op+2);
256 O << "," << ScaleVal;
263 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
264 O << "\"L" << getFunctionNumber() << "$pb\"\n";
265 O << "\"L" << getFunctionNumber() << "$pb\":";
269 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
271 const MRegisterInfo &RI = *TM.getRegisterInfo();
272 unsigned Reg = MO.getReg();
274 default: return true; // Unknown mode.
275 case 'b': // Print QImode register
276 Reg = getX86SubSuperRegister(Reg, MVT::i8);
278 case 'h': // Print QImode high register
279 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
281 case 'w': // Print HImode register
282 Reg = getX86SubSuperRegister(Reg, MVT::i16);
284 case 'k': // Print SImode register
285 Reg = getX86SubSuperRegister(Reg, MVT::i32);
290 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
291 O << (char)tolower(*Name);
295 /// PrintAsmOperand - Print out an operand for an inline asm expression.
297 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
299 const char *ExtraCode) {
300 // Does this asm operand have a single letter operand modifier?
301 if (ExtraCode && ExtraCode[0]) {
302 if (ExtraCode[1] != 0) return true; // Unknown modifier.
304 switch (ExtraCode[0]) {
305 default: return true; // Unknown modifier.
306 case 'b': // Print QImode register
307 case 'h': // Print QImode high register
308 case 'w': // Print HImode register
309 case 'k': // Print SImode register
310 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
314 printOperand(MI, OpNo);
318 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
321 const char *ExtraCode) {
322 if (ExtraCode && ExtraCode[0])
323 return true; // Unknown modifier.
324 printMemReference(MI, OpNo);
328 /// printMachineInstruction -- Print out a single X86 LLVM instruction
329 /// MI in Intel syntax to the current output stream.
331 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
333 // This works around some Darwin assembler bugs.
335 switch (MI->getOpcode()) {
337 O << "rep/movsb (%esi),(%edi)\n";
340 O << "rep/movsl (%esi),(%edi)\n";
343 O << "rep/movsw (%esi),(%edi)\n";
359 // See if a truncate instruction can be turned into a nop.
360 switch (MI->getOpcode()) {
362 case X86::TRUNC_R32_R16:
363 case X86::TRUNC_R32_R8:
364 case X86::TRUNC_R16_R8: {
365 const MachineOperand &MO0 = MI->getOperand(0);
366 const MachineOperand &MO1 = MI->getOperand(1);
367 unsigned Reg0 = MO0.getReg();
368 unsigned Reg1 = MO1.getReg();
369 if (MI->getOpcode() == X86::TRUNC_R32_R16)
370 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
372 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
373 O << CommentString << " TRUNCATE ";
380 // Call the autogenerated instruction printer routines.
381 printInstruction(MI);
384 // Include the auto-generated portion of the assembly writer.
385 #include "X86GenAsmWriter.inc"