1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "asm-printer"
17 #include "X86ATTAsmPrinter.h"
20 #include "X86MachineFunctionInfo.h"
21 #include "X86TargetMachine.h"
22 #include "X86TargetAsmInfo.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineJumpTableInfo.h"
26 #include "llvm/Module.h"
27 #include "llvm/Support/Mangler.h"
28 #include "llvm/Target/TargetAsmInfo.h"
29 #include "llvm/Target/TargetOptions.h"
30 #include "llvm/ADT/Statistic.h"
33 STATISTIC(EmittedInsts, "Number of machine instrs printed");
35 static std::string computePICLabel(unsigned FnNum,
36 const TargetAsmInfo *TAI,
37 const X86Subtarget* Subtarget) {
39 if (Subtarget->isTargetDarwin())
40 label = "\"L" + utostr_32(FnNum) + "$pb\"";
41 else if (Subtarget->isTargetELF())
42 label = ".Lllvm$" + utostr_32(FnNum) + "$piclabel";
44 assert(0 && "Don't know how to print PIC label!\n");
49 /// getSectionForFunction - Return the section that we should emit the
50 /// specified function body into.
51 std::string X86ATTAsmPrinter::getSectionForFunction(const Function &F) const {
52 switch (F.getLinkage()) {
53 default: assert(0 && "Unknown linkage type!");
54 case Function::InternalLinkage:
55 case Function::DLLExportLinkage:
56 case Function::ExternalLinkage:
57 return TAI->getTextSection();
58 case Function::WeakLinkage:
59 case Function::LinkOnceLinkage:
60 if (Subtarget->isTargetDarwin()) {
61 return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
62 } else if (Subtarget->isTargetCygMing()) {
63 return "\t.section\t.text$linkonce." + CurrentFnName + ",\"ax\"";
65 return "\t.section\t.llvm.linkonce.t." + CurrentFnName +
71 /// runOnMachineFunction - This uses the printMachineInstruction()
72 /// method to print assembly for each instruction.
74 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
75 if (TAI->doesSupportDebugInformation()) {
76 // Let PassManager know we need debug information and relay
77 // the MachineModuleInfo address on to DwarfWriter.
78 MMI = &getAnalysis<MachineModuleInfo>();
79 DW.SetModuleInfo(MMI);
82 SetupMachineFunction(MF);
85 // Print out constants referenced by the function
86 EmitConstantPool(MF.getConstantPool());
88 // Print out labels for the function.
89 const Function *F = MF.getFunction();
90 unsigned CC = F->getCallingConv();
92 // Populate function information map. Actually, We don't want to populate
93 // non-stdcall or non-fastcall functions' information right now.
94 if (CC == CallingConv::X86_StdCall || CC == CallingConv::X86_FastCall)
95 FunctionInfoMap[F] = *MF.getInfo<X86MachineFunctionInfo>();
97 X86SharedAsmPrinter::decorateName(CurrentFnName, F);
99 SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
101 switch (F->getLinkage()) {
102 default: assert(0 && "Unknown linkage type!");
103 case Function::InternalLinkage: // Symbols default to internal.
104 if (Subtarget->isTargetDarwin())
105 // FIXME: This should be parameterized somewhere.
106 EmitAlignment(4, F, 0, true, 0x90);
108 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
110 case Function::DLLExportLinkage:
111 DLLExportedFns.insert(Mang->makeNameProper(F->getName(), ""));
113 case Function::ExternalLinkage:
114 if (Subtarget->isTargetDarwin())
115 // FIXME: This should be parameterized somewhere.
116 EmitAlignment(4, F, 0, true, 0x90);
118 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
119 O << "\t.globl\t" << CurrentFnName << "\n";
121 case Function::LinkOnceLinkage:
122 case Function::WeakLinkage:
123 if (Subtarget->isTargetDarwin()) {
124 // FIXME: This should be parameterized somewhere.
125 EmitAlignment(4, F, 0, true, 0x90);
126 O << "\t.globl\t" << CurrentFnName << "\n";
127 O << TAI->getWeakDefDirective() << CurrentFnName << "\n";
128 } else if (Subtarget->isTargetCygMing()) {
129 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
130 O << "\t.globl\t" << CurrentFnName << "\n";
131 O << "\t.linkonce discard\n";
133 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
134 O << "\t.weak\t" << CurrentFnName << "\n";
138 if (F->hasHiddenVisibility()) {
139 if (const char *Directive = TAI->getHiddenDirective())
140 O << Directive << CurrentFnName << "\n";
141 } else if (F->hasProtectedVisibility()) {
142 if (const char *Directive = TAI->getProtectedDirective())
143 O << Directive << CurrentFnName << "\n";
146 if (Subtarget->isTargetELF())
147 O << "\t.type\t" << CurrentFnName << ",@function\n";
148 else if (Subtarget->isTargetCygMing()) {
149 O << "\t.def\t " << CurrentFnName
151 (F->getLinkage() == Function::InternalLinkage ? COFF::C_STAT : COFF::C_EXT)
152 << ";\t.type\t" << (COFF::DT_FCN << COFF::N_BTSHFT)
156 O << CurrentFnName << ":\n";
157 // Add some workaround for linkonce linkage on Cygwin\MinGW
158 if (Subtarget->isTargetCygMing() &&
159 (F->getLinkage() == Function::LinkOnceLinkage ||
160 F->getLinkage() == Function::WeakLinkage))
161 O << "Lllvm$workaround$fake$stub$" << CurrentFnName << ":\n";
163 if (TAI->doesSupportDebugInformation()) {
164 // Emit pre-function debug information.
165 DW.BeginFunction(&MF);
168 // Print out code for the function.
169 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
171 // Print a label for the basic block.
172 if (!I->pred_empty()) {
173 printBasicBlockLabel(I, true);
176 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
178 // Print the assembly for the instruction.
180 printMachineInstruction(II);
184 if (TAI->hasDotTypeDotSizeDirective())
185 O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << "\n";
187 if (TAI->doesSupportDebugInformation()) {
188 // Emit post-function debug information.
192 // Print out jump tables referenced by the function.
193 EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
195 // We didn't modify anything.
199 static inline bool printGOT(TargetMachine &TM, const X86Subtarget* ST) {
200 return ST->isPICStyleGOT() && TM.getRelocationModel() == Reloc::PIC_;
203 static inline bool printStub(TargetMachine &TM, const X86Subtarget* ST) {
204 return ST->isPICStyleStub() && TM.getRelocationModel() != Reloc::Static;
207 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
208 const char *Modifier, bool NotRIPRel) {
209 const MachineOperand &MO = MI->getOperand(OpNo);
210 const MRegisterInfo &RI = *TM.getRegisterInfo();
211 switch (MO.getType()) {
212 case MachineOperand::MO_Register: {
213 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
214 "Virtual registers should not make it this far!");
216 unsigned Reg = MO.getReg();
217 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
218 MVT::ValueType VT = (strcmp(Modifier+6,"64") == 0) ?
219 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
220 ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
221 Reg = getX86SubSuperRegister(Reg, VT);
223 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
224 O << (char)tolower(*Name);
228 case MachineOperand::MO_Immediate:
230 (strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
232 O << MO.getImmedValue();
234 case MachineOperand::MO_MachineBasicBlock:
235 printBasicBlockLabel(MO.getMachineBasicBlock());
237 case MachineOperand::MO_JumpTableIndex: {
238 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
239 if (!isMemOp) O << '$';
240 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
241 << MO.getJumpTableIndex();
243 if (TM.getRelocationModel() == Reloc::PIC_) {
244 if (Subtarget->isPICStyleStub())
245 O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
247 else if (Subtarget->isPICStyleGOT())
251 if (isMemOp && Subtarget->isPICStyleRIPRel() && !NotRIPRel)
255 case MachineOperand::MO_ConstantPoolIndex: {
256 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
257 if (!isMemOp) O << '$';
258 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
259 << MO.getConstantPoolIndex();
261 if (TM.getRelocationModel() == Reloc::PIC_) {
262 if (Subtarget->isPICStyleStub())
263 O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
265 else if (Subtarget->isPICStyleGOT())
269 int Offset = MO.getOffset();
275 if (isMemOp && Subtarget->isPICStyleRIPRel() && !NotRIPRel)
279 case MachineOperand::MO_GlobalAddress: {
280 bool isCallOp = Modifier && !strcmp(Modifier, "call");
281 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
282 bool needCloseParen = false;
284 GlobalValue *GV = MO.getGlobal();
285 GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
286 bool isThreadLocal = GVar && GVar->isThreadLocal();
288 std::string Name = Mang->getValueName(GV);
289 X86SharedAsmPrinter::decorateName(Name, GV);
291 if (!isMemOp && !isCallOp)
293 else if (Name[0] == '$') {
294 // The name begins with a dollar-sign. In order to avoid having it look
295 // like an integer immediate to the assembler, enclose it in parens.
297 needCloseParen = true;
300 if (printStub(TM, Subtarget)) {
301 // Link-once, declaration, or Weakly-linked global variables need
302 // non-lazily-resolved stubs
303 if (GV->isDeclaration() ||
304 GV->hasWeakLinkage() ||
305 GV->hasLinkOnceLinkage()) {
306 // Dynamically-resolved functions need a stub for the function.
307 if (isCallOp && isa<Function>(GV)) {
308 FnStubs.insert(Name);
309 O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
311 GVStubs.insert(Name);
312 O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
315 if (GV->hasDLLImportLinkage())
320 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
321 O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
324 if (GV->hasDLLImportLinkage()) {
329 if (isCallOp && isa<Function>(GV)) {
330 if (printGOT(TM, Subtarget)) {
331 // Assemble call via PLT for non-local symbols
332 if (!(GV->hasHiddenVisibility() || GV->hasProtectedVisibility()) ||
336 if (Subtarget->isTargetCygMing() && GV->isDeclaration())
337 // Save function name for later type emission
338 FnStubs.insert(Name);
342 if (GV->hasExternalWeakLinkage())
343 ExtWeakSymbols.insert(GV);
345 int Offset = MO.getOffset();
352 if (TM.getRelocationModel() == Reloc::PIC_)
353 O << "@TLSGD"; // general dynamic TLS model
355 if (GV->isDeclaration())
356 O << "@INDNTPOFF"; // initial exec TLS model
358 O << "@NTPOFF"; // local exec TLS model
359 } else if (isMemOp) {
360 if (printGOT(TM, Subtarget)) {
361 if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
365 } else if (Subtarget->isPICStyleRIPRel() && !NotRIPRel &&
366 TM.getRelocationModel() != Reloc::Static) {
367 if ((GV->isDeclaration() ||
368 GV->hasWeakLinkage() ||
369 GV->hasLinkOnceLinkage()) &&
370 TM.getRelocationModel() != Reloc::Static)
373 if (needCloseParen) {
374 needCloseParen = false;
378 // Use rip when possible to reduce code size, except when
379 // index or base register are also part of the address. e.g.
380 // foo(%rip)(%rcx,%rax,4) is not legal
390 case MachineOperand::MO_ExternalSymbol: {
391 bool isCallOp = Modifier && !strcmp(Modifier, "call");
392 bool needCloseParen = false;
393 std::string Name(TAI->getGlobalPrefix());
394 Name += MO.getSymbolName();
395 if (isCallOp && printStub(TM, Subtarget)) {
396 FnStubs.insert(Name);
397 O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
402 else if (Name[0] == '$') {
403 // The name begins with a dollar-sign. In order to avoid having it look
404 // like an integer immediate to the assembler, enclose it in parens.
406 needCloseParen = true;
411 if (printGOT(TM, Subtarget)) {
412 std::string GOTName(TAI->getGlobalPrefix());
413 GOTName+="_GLOBAL_OFFSET_TABLE_";
415 // HACK! Emit extra offset to PC during printing GOT offset to
416 // compensate for the size of popl instruction. The resulting code
420 // popl %some_register
421 // addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
423 << computePICLabel(getFunctionNumber(), TAI, Subtarget) << "]";
432 if (!isCallOp && Subtarget->isPICStyleRIPRel())
438 O << "<unknown operand type>"; return;
442 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
443 unsigned char value = MI->getOperand(Op).getImmedValue();
444 assert(value <= 7 && "Invalid ssecc argument!");
446 case 0: O << "eq"; break;
447 case 1: O << "lt"; break;
448 case 2: O << "le"; break;
449 case 3: O << "unord"; break;
450 case 4: O << "neq"; break;
451 case 5: O << "nlt"; break;
452 case 6: O << "nle"; break;
453 case 7: O << "ord"; break;
457 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
458 const char *Modifier){
459 assert(isMem(MI, Op) && "Invalid memory reference!");
460 MachineOperand BaseReg = MI->getOperand(Op);
461 MachineOperand IndexReg = MI->getOperand(Op+2);
462 const MachineOperand &DispSpec = MI->getOperand(Op+3);
464 bool NotRIPRel = IndexReg.getReg() || BaseReg.getReg();
465 if (DispSpec.isGlobalAddress() ||
466 DispSpec.isConstantPoolIndex() ||
467 DispSpec.isJumpTableIndex()) {
468 printOperand(MI, Op+3, "mem", NotRIPRel);
470 int DispVal = DispSpec.getImmedValue();
471 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
475 if (IndexReg.getReg() || BaseReg.getReg()) {
476 unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue();
477 unsigned BaseRegOperand = 0, IndexRegOperand = 2;
479 // There are cases where we can end up with ESP/RSP in the indexreg slot.
480 // If this happens, swap the base/index register to support assemblers that
481 // don't work when the index is *SP.
482 if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
483 assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
484 std::swap(BaseReg, IndexReg);
485 std::swap(BaseRegOperand, IndexRegOperand);
489 if (BaseReg.getReg())
490 printOperand(MI, Op+BaseRegOperand, Modifier);
492 if (IndexReg.getReg()) {
494 printOperand(MI, Op+IndexRegOperand, Modifier);
496 O << "," << ScaleVal;
502 void X86ATTAsmPrinter::printPICJumpTableSetLabel(unsigned uid,
503 const MachineBasicBlock *MBB) const {
504 if (!TAI->getSetDirective())
507 // We don't need .set machinery if we have GOT-style relocations
508 if (Subtarget->isPICStyleGOT())
511 O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix()
512 << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ',';
513 printBasicBlockLabel(MBB, false, false);
514 if (Subtarget->isPICStyleRIPRel())
515 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
516 << '_' << uid << '\n';
518 O << '-' << computePICLabel(getFunctionNumber(), TAI, Subtarget) << '\n';
521 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
522 std::string label = computePICLabel(getFunctionNumber(), TAI, Subtarget);
523 O << label << "\n" << label << ":";
527 void X86ATTAsmPrinter::printPICJumpTableEntry(const MachineJumpTableInfo *MJTI,
528 const MachineBasicBlock *MBB,
531 const char *JTEntryDirective = MJTI->getEntrySize() == 4 ?
532 TAI->getData32bitsDirective() : TAI->getData64bitsDirective();
534 O << JTEntryDirective << ' ';
536 if (TM.getRelocationModel() == Reloc::PIC_) {
537 if (Subtarget->isPICStyleRIPRel() || Subtarget->isPICStyleStub()) {
538 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
539 << '_' << uid << "_set_" << MBB->getNumber();
540 } else if (Subtarget->isPICStyleGOT()) {
541 printBasicBlockLabel(MBB, false, false);
544 assert(0 && "Don't know how to print MBB label for this PIC mode");
546 printBasicBlockLabel(MBB, false, false);
549 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
551 const MRegisterInfo &RI = *TM.getRegisterInfo();
552 unsigned Reg = MO.getReg();
554 default: return true; // Unknown mode.
555 case 'b': // Print QImode register
556 Reg = getX86SubSuperRegister(Reg, MVT::i8);
558 case 'h': // Print QImode high register
559 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
561 case 'w': // Print HImode register
562 Reg = getX86SubSuperRegister(Reg, MVT::i16);
564 case 'k': // Print SImode register
565 Reg = getX86SubSuperRegister(Reg, MVT::i32);
567 case 'q': // Print DImode register
568 Reg = getX86SubSuperRegister(Reg, MVT::i64);
573 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
574 O << (char)tolower(*Name);
578 /// PrintAsmOperand - Print out an operand for an inline asm expression.
580 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
582 const char *ExtraCode) {
583 // Does this asm operand have a single letter operand modifier?
584 if (ExtraCode && ExtraCode[0]) {
585 if (ExtraCode[1] != 0) return true; // Unknown modifier.
587 switch (ExtraCode[0]) {
588 default: return true; // Unknown modifier.
589 case 'c': // Don't print "$" before a global var name or constant.
590 printOperand(MI, OpNo, "mem");
592 case 'b': // Print QImode register
593 case 'h': // Print QImode high register
594 case 'w': // Print HImode register
595 case 'k': // Print SImode register
596 case 'q': // Print DImode register
597 if (MI->getOperand(OpNo).isRegister())
598 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
599 printOperand(MI, OpNo);
602 case 'P': // Don't print @PLT, but do print as memory.
603 printOperand(MI, OpNo, "mem");
608 printOperand(MI, OpNo);
612 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
615 const char *ExtraCode) {
616 if (ExtraCode && ExtraCode[0]) {
617 if (ExtraCode[1] != 0) return true; // Unknown modifier.
619 switch (ExtraCode[0]) {
620 default: return true; // Unknown modifier.
621 case 'b': // Print QImode register
622 case 'h': // Print QImode high register
623 case 'w': // Print HImode register
624 case 'k': // Print SImode register
625 case 'q': // Print SImode register
626 // These only apply to registers, ignore on mem.
630 printMemReference(MI, OpNo);
634 /// printMachineInstruction -- Print out a single X86 LLVM instruction
635 /// MI in AT&T syntax to the current output stream.
637 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
640 // See if a truncate instruction can be turned into a nop.
641 switch (MI->getOpcode()) {
643 case X86::PsMOVZX64rr32:
644 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
648 // Call the autogenerated instruction printer routines.
649 printInstruction(MI);
652 // Include the auto-generated portion of the assembly writer.
653 #include "X86GenAsmWriter.inc"