1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86ATTAsmPrinter.h"
18 #include "X86TargetMachine.h"
19 #include "X86TargetAsmInfo.h"
20 #include "llvm/Module.h"
21 #include "llvm/Support/Mangler.h"
22 #include "llvm/Target/TargetAsmInfo.h"
23 #include "llvm/Target/TargetOptions.h"
27 /// runOnMachineFunction - This uses the printMachineInstruction()
28 /// method to print assembly for each instruction.
30 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
31 if (Subtarget->isTargetDarwin()) {
32 // Let PassManager know we need debug information and relay
33 // the MachineDebugInfo address on to DwarfWriter.
34 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
37 SetupMachineFunction(MF);
40 // Print out constants referenced by the function
41 EmitConstantPool(MF.getConstantPool());
43 // Print out labels for the function.
44 const Function *F = MF.getFunction();
45 switch (F->getLinkage()) {
46 default: assert(0 && "Unknown linkage type!");
47 case Function::InternalLinkage: // Symbols default to internal.
48 SwitchToTextSection(TAI->getTextSection(), F);
49 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
51 case Function::ExternalLinkage:
52 SwitchToTextSection(TAI->getTextSection(), F);
53 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
54 O << "\t.globl\t" << CurrentFnName << "\n";
56 case Function::WeakLinkage:
57 case Function::LinkOnceLinkage:
58 if (Subtarget->isTargetDarwin()) {
60 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
61 O << "\t.globl\t" << CurrentFnName << "\n";
62 O << "\t.weak_definition\t" << CurrentFnName << "\n";
63 } else if (Subtarget->TargetType == X86Subtarget::isCygwin) {
64 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
65 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
67 SwitchToTextSection("", F);
68 O << "\t.weak " << CurrentFnName << "\n";
70 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
71 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
72 << ",\"ax\",@progbits\n";
73 SwitchToTextSection("", F);
74 O << "\t.weak " << CurrentFnName << "\n";
78 O << CurrentFnName << ":\n";
80 if (Subtarget->isTargetDarwin()) {
81 // Emit pre-function debug information.
82 DW.BeginFunction(&MF);
85 // Print out code for the function.
86 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
88 // Print a label for the basic block.
89 if (I->pred_begin() != I->pred_end()) {
90 printBasicBlockLabel(I, true);
93 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
95 // Print the assembly for the instruction.
97 printMachineInstruction(II);
101 // Print out jump tables referenced by the function
102 // Mac OS X requires at least one non-local (e.g. L1) labels before local
103 // lables that are used in jump table expressions (e.g. LBB1_1-LJT1_0).
104 EmitJumpTableInfo(MF.getJumpTableInfo());
106 if (TAI->hasDotTypeDotSizeDirective())
107 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
109 if (Subtarget->isTargetDarwin()) {
110 // Emit post-function debug information.
114 // We didn't modify anything.
118 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
119 const char *Modifier) {
120 const MachineOperand &MO = MI->getOperand(OpNo);
121 const MRegisterInfo &RI = *TM.getRegisterInfo();
122 switch (MO.getType()) {
123 case MachineOperand::MO_Register: {
124 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
125 "Virtual registers should not make it this far!");
127 unsigned Reg = MO.getReg();
128 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
129 MVT::ValueType VT = (strcmp(Modifier,"subreg16") == 0)
130 ? MVT::i16 : MVT::i8;
131 Reg = getX86SubSuperRegister(Reg, VT);
133 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
134 O << (char)tolower(*Name);
138 case MachineOperand::MO_Immediate:
139 if (!Modifier || strcmp(Modifier, "debug") != 0)
141 O << MO.getImmedValue();
143 case MachineOperand::MO_MachineBasicBlock:
144 printBasicBlockLabel(MO.getMachineBasicBlock());
146 case MachineOperand::MO_JumpTableIndex: {
147 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
148 if (!isMemOp) O << '$';
149 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
150 << MO.getJumpTableIndex();
151 if (Subtarget->isTargetDarwin() &&
152 TM.getRelocationModel() == Reloc::PIC_)
153 O << "-\"L" << getFunctionNumber() << "$pb\"";
156 case MachineOperand::MO_ConstantPoolIndex: {
157 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
158 if (!isMemOp) O << '$';
159 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
160 << MO.getConstantPoolIndex();
161 if (Subtarget->isTargetDarwin() &&
162 TM.getRelocationModel() == Reloc::PIC_)
163 O << "-\"L" << getFunctionNumber() << "$pb\"";
164 int Offset = MO.getOffset();
171 case MachineOperand::MO_GlobalAddress: {
172 bool isCallOp = Modifier && !strcmp(Modifier, "call");
173 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
174 if (!isMemOp && !isCallOp) O << '$';
175 // Darwin block shameless ripped from PPCAsmPrinter.cpp
176 if (Subtarget->isTargetDarwin() &&
177 TM.getRelocationModel() != Reloc::Static) {
178 GlobalValue *GV = MO.getGlobal();
179 std::string Name = Mang->getValueName(GV);
180 // Link-once, External, or Weakly-linked global variables need
181 // non-lazily-resolved stubs
182 if (GV->isExternal() || GV->hasWeakLinkage() ||
183 GV->hasLinkOnceLinkage()) {
184 // Dynamically-resolved functions need a stub for the function.
185 if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
186 FnStubs.insert(Name);
187 O << "L" << Name << "$stub";
189 GVStubs.insert(Name);
190 O << "L" << Name << "$non_lazy_ptr";
193 O << Mang->getValueName(GV);
195 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
196 O << "-\"L" << getFunctionNumber() << "$pb\"";
198 O << Mang->getValueName(MO.getGlobal());
199 int Offset = MO.getOffset();
206 case MachineOperand::MO_ExternalSymbol: {
207 bool isCallOp = Modifier && !strcmp(Modifier, "call");
209 Subtarget->isTargetDarwin() &&
210 TM.getRelocationModel() != Reloc::Static) {
211 std::string Name(TAI->getGlobalPrefix());
212 Name += MO.getSymbolName();
213 FnStubs.insert(Name);
214 O << "L" << Name << "$stub";
217 if (!isCallOp) O << '$';
218 O << TAI->getGlobalPrefix() << MO.getSymbolName();
222 O << "<unknown operand type>"; return;
226 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
227 unsigned char value = MI->getOperand(Op).getImmedValue();
228 assert(value <= 7 && "Invalid ssecc argument!");
230 case 0: O << "eq"; break;
231 case 1: O << "lt"; break;
232 case 2: O << "le"; break;
233 case 3: O << "unord"; break;
234 case 4: O << "neq"; break;
235 case 5: O << "nlt"; break;
236 case 6: O << "nle"; break;
237 case 7: O << "ord"; break;
241 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
242 assert(isMem(MI, Op) && "Invalid memory reference!");
244 const MachineOperand &BaseReg = MI->getOperand(Op);
245 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
246 const MachineOperand &IndexReg = MI->getOperand(Op+2);
247 const MachineOperand &DispSpec = MI->getOperand(Op+3);
249 if (BaseReg.isFrameIndex()) {
250 O << "[frame slot #" << BaseReg.getFrameIndex();
251 if (DispSpec.getImmedValue())
252 O << " + " << DispSpec.getImmedValue();
257 if (DispSpec.isGlobalAddress() ||
258 DispSpec.isConstantPoolIndex() ||
259 DispSpec.isJumpTableIndex()) {
260 printOperand(MI, Op+3, "mem");
262 int DispVal = DispSpec.getImmedValue();
263 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
267 if (IndexReg.getReg() || BaseReg.getReg()) {
269 if (BaseReg.getReg())
270 printOperand(MI, Op);
272 if (IndexReg.getReg()) {
274 printOperand(MI, Op+2);
276 O << "," << ScaleVal;
283 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
284 O << "\"L" << getFunctionNumber() << "$pb\"\n";
285 O << "\"L" << getFunctionNumber() << "$pb\":";
289 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
291 const MRegisterInfo &RI = *TM.getRegisterInfo();
292 unsigned Reg = MO.getReg();
294 default: return true; // Unknown mode.
295 case 'b': // Print QImode register
296 Reg = getX86SubSuperRegister(Reg, MVT::i8);
298 case 'h': // Print QImode high register
299 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
301 case 'w': // Print HImode register
302 Reg = getX86SubSuperRegister(Reg, MVT::i16);
304 case 'k': // Print SImode register
305 Reg = getX86SubSuperRegister(Reg, MVT::i32);
310 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
311 O << (char)tolower(*Name);
315 /// PrintAsmOperand - Print out an operand for an inline asm expression.
317 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
319 const char *ExtraCode) {
320 // Does this asm operand have a single letter operand modifier?
321 if (ExtraCode && ExtraCode[0]) {
322 if (ExtraCode[1] != 0) return true; // Unknown modifier.
324 switch (ExtraCode[0]) {
325 default: return true; // Unknown modifier.
326 case 'b': // Print QImode register
327 case 'h': // Print QImode high register
328 case 'w': // Print HImode register
329 case 'k': // Print SImode register
330 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
334 printOperand(MI, OpNo);
338 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
341 const char *ExtraCode) {
342 if (ExtraCode && ExtraCode[0])
343 return true; // Unknown modifier.
344 printMemReference(MI, OpNo);
348 /// printMachineInstruction -- Print out a single X86 LLVM instruction
349 /// MI in Intel syntax to the current output stream.
351 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
353 // This works around some Darwin assembler bugs.
354 if (Subtarget->isTargetDarwin()) {
355 switch (MI->getOpcode()) {
357 O << "rep/movsb (%esi),(%edi)\n";
360 O << "rep/movsl (%esi),(%edi)\n";
363 O << "rep/movsw (%esi),(%edi)\n";
379 // See if a truncate instruction can be turned into a nop.
380 switch (MI->getOpcode()) {
382 case X86::TRUNC_GR32_GR16:
383 case X86::TRUNC_GR32_GR8:
384 case X86::TRUNC_GR16_GR8: {
385 const MachineOperand &MO0 = MI->getOperand(0);
386 const MachineOperand &MO1 = MI->getOperand(1);
387 unsigned Reg0 = MO0.getReg();
388 unsigned Reg1 = MO1.getReg();
389 if (MI->getOpcode() == X86::TRUNC_GR32_GR16)
390 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
392 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
393 O << TAI->getCommentString() << " TRUNCATE ";
400 // Call the autogenerated instruction printer routines.
401 printInstruction(MI);
404 // Include the auto-generated portion of the assembly writer.
405 #include "X86GenAsmWriter.inc"