1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86ATTAsmPrinter.h"
18 #include "X86TargetMachine.h"
19 #include "X86TargetAsmInfo.h"
20 #include "llvm/Module.h"
21 #include "llvm/Support/Mangler.h"
22 #include "llvm/Target/TargetAsmInfo.h"
23 #include "llvm/Target/TargetOptions.h"
27 /// runOnMachineFunction - This uses the printMachineInstruction()
28 /// method to print assembly for each instruction.
30 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
31 if (Subtarget->isTargetDarwin()) {
32 // Let PassManager know we need debug information and relay
33 // the MachineDebugInfo address on to DwarfWriter.
34 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
37 SetupMachineFunction(MF);
40 // Print out constants referenced by the function
41 EmitConstantPool(MF.getConstantPool());
43 // Print out labels for the function.
44 const Function *F = MF.getFunction();
45 switch (F->getLinkage()) {
46 default: assert(0 && "Unknown linkage type!");
47 case Function::InternalLinkage: // Symbols default to internal.
48 SwitchToTextSection(TAI->getTextSection(), F);
49 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
51 case Function::ExternalLinkage:
52 SwitchToTextSection(TAI->getTextSection(), F);
53 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
54 O << "\t.globl\t" << CurrentFnName << "\n";
56 case Function::WeakLinkage:
57 case Function::LinkOnceLinkage:
58 if (Subtarget->isTargetDarwin()) {
60 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
61 O << "\t.globl\t" << CurrentFnName << "\n";
62 O << "\t.weak_definition\t" << CurrentFnName << "\n";
63 } else if (Subtarget->TargetType == X86Subtarget::isCygwin) {
64 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
65 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
67 SwitchToTextSection("", F);
68 O << "\t.weak " << CurrentFnName << "\n";
70 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
71 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
72 << ",\"ax\",@progbits\n";
73 SwitchToTextSection("", F);
74 O << "\t.weak " << CurrentFnName << "\n";
78 O << CurrentFnName << ":\n";
80 if (Subtarget->isTargetDarwin()) {
81 // Emit pre-function debug information.
82 DW.BeginFunction(&MF);
85 // Print out code for the function.
86 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
88 // Print a label for the basic block.
89 if (I->pred_begin() != I->pred_end()) {
90 printBasicBlockLabel(I, true);
93 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
95 // Print the assembly for the instruction.
97 printMachineInstruction(II);
101 // Print out jump tables referenced by the function
102 // Mac OS X requires at least one non-local (e.g. L1) labels before local
103 // lables that are used in jump table expressions (e.g. LBB1_1-LJT1_0).
104 EmitJumpTableInfo(MF.getJumpTableInfo());
106 if (TAI->hasDotTypeDotSizeDirective())
107 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
109 if (Subtarget->isTargetDarwin()) {
110 // Emit post-function debug information.
114 // We didn't modify anything.
118 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
119 const char *Modifier) {
120 const MachineOperand &MO = MI->getOperand(OpNo);
121 const MRegisterInfo &RI = *TM.getRegisterInfo();
122 switch (MO.getType()) {
123 case MachineOperand::MO_Register: {
124 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
125 "Virtual registers should not make it this far!");
127 unsigned Reg = MO.getReg();
128 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
129 MVT::ValueType VT = (strcmp(Modifier+6,"64") == 0) ?
130 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
131 ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
132 Reg = getX86SubSuperRegister(Reg, VT);
134 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
135 O << (char)tolower(*Name);
139 case MachineOperand::MO_Immediate:
140 if (!Modifier || strcmp(Modifier, "debug") != 0)
142 O << MO.getImmedValue();
144 case MachineOperand::MO_MachineBasicBlock:
145 printBasicBlockLabel(MO.getMachineBasicBlock());
147 case MachineOperand::MO_JumpTableIndex: {
148 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
149 if (!isMemOp) O << '$';
150 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
151 << MO.getJumpTableIndex();
152 if (X86PICStyle == PICStyle::Stub &&
153 TM.getRelocationModel() == Reloc::PIC_)
154 O << "-\"L" << getFunctionNumber() << "$pb\"";
155 if (Subtarget->is64Bit())
159 case MachineOperand::MO_ConstantPoolIndex: {
160 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
161 if (!isMemOp) O << '$';
162 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
163 << MO.getConstantPoolIndex();
164 if (X86PICStyle == PICStyle::Stub &&
165 TM.getRelocationModel() == Reloc::PIC_)
166 O << "-\"L" << getFunctionNumber() << "$pb\"";
167 int Offset = MO.getOffset();
173 if (Subtarget->is64Bit())
177 case MachineOperand::MO_GlobalAddress: {
178 bool isCallOp = Modifier && !strcmp(Modifier, "call");
179 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
180 if (!isMemOp && !isCallOp) O << '$';
182 GlobalValue *GV = MO.getGlobal();
183 std::string Name = Mang->getValueName(GV);
184 bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
185 GV->hasLinkOnceLinkage());
186 if (X86PICStyle == PICStyle::Stub &&
187 TM.getRelocationModel() != Reloc::Static) {
188 // Link-once, External, or Weakly-linked global variables need
189 // non-lazily-resolved stubs
191 // Dynamically-resolved functions need a stub for the function.
192 if (isCallOp && isa<Function>(GV)) {
193 FnStubs.insert(Name);
194 O << "L" << Name << "$stub";
196 GVStubs.insert(Name);
197 O << "L" << Name << "$non_lazy_ptr";
201 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
202 O << "-\"L" << getFunctionNumber() << "$pb\"";
206 int Offset = MO.getOffset();
213 Subtarget->is64Bit()) {
214 if (isExt && TM.getRelocationModel() != Reloc::Static)
221 case MachineOperand::MO_ExternalSymbol: {
222 bool isCallOp = Modifier && !strcmp(Modifier, "call");
224 X86PICStyle == PICStyle::Stub &&
225 TM.getRelocationModel() != Reloc::Static) {
226 std::string Name(TAI->getGlobalPrefix());
227 Name += MO.getSymbolName();
228 FnStubs.insert(Name);
229 O << "L" << Name << "$stub";
232 if (!isCallOp) O << '$';
233 O << TAI->getGlobalPrefix() << MO.getSymbolName();
236 Subtarget->is64Bit())
242 O << "<unknown operand type>"; return;
246 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
247 unsigned char value = MI->getOperand(Op).getImmedValue();
248 assert(value <= 7 && "Invalid ssecc argument!");
250 case 0: O << "eq"; break;
251 case 1: O << "lt"; break;
252 case 2: O << "le"; break;
253 case 3: O << "unord"; break;
254 case 4: O << "neq"; break;
255 case 5: O << "nlt"; break;
256 case 6: O << "nle"; break;
257 case 7: O << "ord"; break;
261 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
262 const char *Modifier){
263 assert(isMem(MI, Op) && "Invalid memory reference!");
265 const MachineOperand &BaseReg = MI->getOperand(Op);
266 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
267 const MachineOperand &IndexReg = MI->getOperand(Op+2);
268 const MachineOperand &DispSpec = MI->getOperand(Op+3);
270 if (BaseReg.isFrameIndex()) {
271 O << "[frame slot #" << BaseReg.getFrameIndex();
272 if (DispSpec.getImmedValue())
273 O << " + " << DispSpec.getImmedValue();
278 if (DispSpec.isGlobalAddress() ||
279 DispSpec.isConstantPoolIndex() ||
280 DispSpec.isJumpTableIndex()) {
281 printOperand(MI, Op+3, "mem");
283 int DispVal = DispSpec.getImmedValue();
284 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
288 if (IndexReg.getReg() || BaseReg.getReg()) {
290 if (BaseReg.getReg()) {
291 printOperand(MI, Op, Modifier);
294 if (IndexReg.getReg()) {
296 printOperand(MI, Op+2, Modifier);
298 O << "," << ScaleVal;
305 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
306 O << "\"L" << getFunctionNumber() << "$pb\"\n";
307 O << "\"L" << getFunctionNumber() << "$pb\":";
311 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
313 const MRegisterInfo &RI = *TM.getRegisterInfo();
314 unsigned Reg = MO.getReg();
316 default: return true; // Unknown mode.
317 case 'b': // Print QImode register
318 Reg = getX86SubSuperRegister(Reg, MVT::i8);
320 case 'h': // Print QImode high register
321 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
323 case 'w': // Print HImode register
324 Reg = getX86SubSuperRegister(Reg, MVT::i16);
326 case 'k': // Print SImode register
327 Reg = getX86SubSuperRegister(Reg, MVT::i32);
332 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
333 O << (char)tolower(*Name);
337 /// PrintAsmOperand - Print out an operand for an inline asm expression.
339 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
341 const char *ExtraCode) {
342 // Does this asm operand have a single letter operand modifier?
343 if (ExtraCode && ExtraCode[0]) {
344 if (ExtraCode[1] != 0) return true; // Unknown modifier.
346 switch (ExtraCode[0]) {
347 default: return true; // Unknown modifier.
348 case 'b': // Print QImode register
349 case 'h': // Print QImode high register
350 case 'w': // Print HImode register
351 case 'k': // Print SImode register
352 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
356 printOperand(MI, OpNo);
360 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
363 const char *ExtraCode) {
364 if (ExtraCode && ExtraCode[0])
365 return true; // Unknown modifier.
366 printMemReference(MI, OpNo);
370 /// printMachineInstruction -- Print out a single X86 LLVM instruction
371 /// MI in Intel syntax to the current output stream.
373 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
376 // See if a truncate instruction can be turned into a nop.
377 switch (MI->getOpcode()) {
379 case X86::TRUNC_64to32:
380 case X86::TRUNC_64to16:
381 case X86::TRUNC_32to16:
382 case X86::TRUNC_32to8:
383 case X86::TRUNC_16to8:
384 case X86::TRUNC_32_to8:
385 case X86::TRUNC_16_to8: {
386 const MachineOperand &MO0 = MI->getOperand(0);
387 const MachineOperand &MO1 = MI->getOperand(1);
388 unsigned Reg0 = MO0.getReg();
389 unsigned Reg1 = MO1.getReg();
390 unsigned Opc = MI->getOpcode();
391 if (Opc == X86::TRUNC_64to32)
392 Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
393 else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
394 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
396 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
397 O << TAI->getCommentString() << " TRUNCATE ";
402 case X86::PsMOVZX64rr32:
403 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
407 // Call the autogenerated instruction printer routines.
408 printInstruction(MI);
411 // Include the auto-generated portion of the assembly writer.
412 #include "X86GenAsmWriter.inc"