1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "asm-printer"
17 #include "X86ATTAsmPrinter.h"
19 #include "X86MachineFunctionInfo.h"
20 #include "X86TargetMachine.h"
21 #include "X86TargetAsmInfo.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/CallingConv.h"
24 #include "llvm/Module.h"
25 #include "llvm/Support/Mangler.h"
26 #include "llvm/Target/TargetAsmInfo.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/ADT/Statistic.h"
31 STATISTIC(EmittedInsts, "Number of machine instrs printed");
33 static std::string computePICLabel(unsigned fnNumber,
34 const X86Subtarget* Subtarget)
38 if (Subtarget->isTargetDarwin()) {
39 label = "\"L" + utostr_32(fnNumber) + "$pb\"";
40 } else if (Subtarget->isTargetELF()) {
41 label = ".Lllvm$" + utostr_32(fnNumber) + "$piclabel";
43 assert(0 && "Don't know how to print PIC label!\n");
48 /// getSectionForFunction - Return the section that we should emit the
49 /// specified function body into.
50 std::string X86ATTAsmPrinter::getSectionForFunction(const Function &F) const {
51 switch (F.getLinkage()) {
52 default: assert(0 && "Unknown linkage type!");
53 case Function::InternalLinkage:
54 case Function::DLLExportLinkage:
55 case Function::ExternalLinkage:
56 return TAI->getTextSection();
57 case Function::WeakLinkage:
58 case Function::LinkOnceLinkage:
59 if (Subtarget->isTargetDarwin()) {
60 return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
61 } else if (Subtarget->isTargetCygMing()) {
62 return "\t.section\t.text$linkonce." + CurrentFnName + ",\"ax\"\n";
64 return "\t.section\t.llvm.linkonce.t." + CurrentFnName +
65 ",\"ax\",@progbits\n";
70 /// runOnMachineFunction - This uses the printMachineInstruction()
71 /// method to print assembly for each instruction.
73 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
74 if (Subtarget->isTargetDarwin() ||
75 Subtarget->isTargetELF() ||
76 Subtarget->isTargetCygMing()) {
77 // Let PassManager know we need debug information and relay
78 // the MachineDebugInfo address on to DwarfWriter.
79 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
82 SetupMachineFunction(MF);
85 // Print out constants referenced by the function
86 EmitConstantPool(MF.getConstantPool());
88 // Print out labels for the function.
89 const Function *F = MF.getFunction();
90 unsigned CC = F->getCallingConv();
92 // Populate function information map. Actually, We don't want to populate
93 // non-stdcall or non-fastcall functions' information right now.
94 if (CC == CallingConv::X86_StdCall || CC == CallingConv::X86_FastCall)
95 FunctionInfoMap[F] = *MF.getInfo<X86FunctionInfo>();
97 X86SharedAsmPrinter::decorateName(CurrentFnName, F);
99 SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
101 switch (F->getLinkage()) {
102 default: assert(0 && "Unknown linkage type!");
103 case Function::InternalLinkage: // Symbols default to internal.
104 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
106 case Function::DLLExportLinkage:
107 DLLExportedFns.insert(Mang->makeNameProper(F->getName(), ""));
109 case Function::ExternalLinkage:
110 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
111 O << "\t.globl\t" << CurrentFnName << "\n";
113 case Function::LinkOnceLinkage:
114 case Function::WeakLinkage:
115 if (Subtarget->isTargetDarwin()) {
116 O << "\t.globl\t" << CurrentFnName << "\n";
117 O << "\t.weak_definition\t" << CurrentFnName << "\n";
118 } else if (Subtarget->isTargetCygMing()) {
119 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
120 O << "\t.linkonce discard\n";
121 O << "\t.globl " << CurrentFnName << "\n";
123 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
124 O << "\t.weak " << CurrentFnName << "\n";
128 if (F->hasHiddenVisibility() && !Subtarget->isTargetDarwin())
129 O << "\t.hidden " << CurrentFnName << "\n";
131 O << CurrentFnName << ":\n";
132 // Add some workaround for linkonce linkage on Cygwin\MinGW
133 if (Subtarget->isTargetCygMing() &&
134 (F->getLinkage() == Function::LinkOnceLinkage ||
135 F->getLinkage() == Function::WeakLinkage))
136 O << "Lllvm$workaround$fake$stub$" << CurrentFnName << ":\n";
138 if (Subtarget->isTargetDarwin() ||
139 Subtarget->isTargetELF() ||
140 Subtarget->isTargetCygMing()) {
141 // Emit pre-function debug information.
142 DW.BeginFunction(&MF);
145 // Print out code for the function.
146 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
148 // Print a label for the basic block.
149 if (I->pred_begin() != I->pred_end()) {
150 printBasicBlockLabel(I, true);
153 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
155 // Print the assembly for the instruction.
157 printMachineInstruction(II);
161 // Print out jump tables referenced by the function.
163 // Mac OS X requires that the jump table follow the function, so that the jump
164 // table is part of the same atom that the function is in.
165 EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
167 if (TAI->hasDotTypeDotSizeDirective())
168 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
170 if (Subtarget->isTargetDarwin() ||
171 Subtarget->isTargetELF() ||
172 Subtarget->isTargetCygMing()) {
173 // Emit post-function debug information.
177 // We didn't modify anything.
181 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
182 const char *Modifier, bool NotRIPRel) {
183 const MachineOperand &MO = MI->getOperand(OpNo);
184 const MRegisterInfo &RI = *TM.getRegisterInfo();
185 switch (MO.getType()) {
186 case MachineOperand::MO_Register: {
187 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
188 "Virtual registers should not make it this far!");
190 unsigned Reg = MO.getReg();
191 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
192 MVT::ValueType VT = (strcmp(Modifier+6,"64") == 0) ?
193 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
194 ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
195 Reg = getX86SubSuperRegister(Reg, VT);
197 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
198 O << (char)tolower(*Name);
202 case MachineOperand::MO_Immediate:
203 if (!Modifier || strcmp(Modifier, "debug") != 0)
205 O << MO.getImmedValue();
207 case MachineOperand::MO_MachineBasicBlock:
208 printBasicBlockLabel(MO.getMachineBasicBlock());
210 case MachineOperand::MO_JumpTableIndex: {
211 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
212 if (!isMemOp) O << '$';
213 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
214 << MO.getJumpTableIndex();
216 if (TM.getRelocationModel() == Reloc::PIC_) {
217 if (Subtarget->isPICStyleStub())
218 O << "-\"L" << getFunctionNumber() << "$pb\"";
219 else if (Subtarget->isPICStyleGOT())
223 if (isMemOp && Subtarget->is64Bit() && !NotRIPRel)
227 case MachineOperand::MO_ConstantPoolIndex: {
228 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
229 if (!isMemOp) O << '$';
230 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
231 << MO.getConstantPoolIndex();
233 if (TM.getRelocationModel() == Reloc::PIC_) {
234 if (Subtarget->isPICStyleStub())
235 O << "-\"L" << getFunctionNumber() << "$pb\"";
236 if (Subtarget->isPICStyleGOT())
240 int Offset = MO.getOffset();
246 if (isMemOp && Subtarget->is64Bit() && !NotRIPRel)
250 case MachineOperand::MO_GlobalAddress: {
251 bool isCallOp = Modifier && !strcmp(Modifier, "call");
252 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
253 if (!isMemOp && !isCallOp) O << '$';
255 GlobalValue *GV = MO.getGlobal();
256 std::string Name = Mang->getValueName(GV);
258 bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
259 GV->hasLinkOnceLinkage());
260 bool isHidden = GV->hasHiddenVisibility();
262 X86SharedAsmPrinter::decorateName(Name, GV);
264 if (Subtarget->isPICStyleStub()) {
265 // Link-once, External, or Weakly-linked global variables need
266 // non-lazily-resolved stubs
268 // Dynamically-resolved functions need a stub for the function.
269 if (isCallOp && isa<Function>(GV)) {
270 FnStubs.insert(Name);
271 O << "L" << Name << "$stub";
273 GVStubs.insert(Name);
274 O << "L" << Name << "$non_lazy_ptr";
277 if (GV->hasDLLImportLinkage()) {
283 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
284 O << "-\"L" << getFunctionNumber() << "$pb\"";
286 if (GV->hasDLLImportLinkage()) {
291 if (Subtarget->isPICStyleGOT() && isCallOp && isa<Function>(GV)) {
292 // Assemble call via PLT for non-local symbols
293 if (!isHidden || isExt)
298 if (GV->hasExternalWeakLinkage())
299 ExtWeakSymbols.insert(GV);
301 int Offset = MO.getOffset();
309 if (Subtarget->isPICStyleGOT()) {
311 } else if (Subtarget->isPICStyleRIPRel()) {
312 O << "@GOTPCREL(%rip)";
313 } if (Subtarget->is64Bit() && !NotRIPRel)
314 // Use rip when possible to reduce code size, except when
315 // index or base register are also part of the address. e.g.
316 // foo(%rip)(%rcx,%rax,4) is not legal
319 if (Subtarget->is64Bit() && !NotRIPRel)
321 else if (Subtarget->isPICStyleGOT())
328 case MachineOperand::MO_ExternalSymbol: {
329 bool isCallOp = Modifier && !strcmp(Modifier, "call");
330 std::string Name(TAI->getGlobalPrefix());
331 Name += MO.getSymbolName();
332 if (isCallOp && Subtarget->isPICStyleStub()) {
333 FnStubs.insert(Name);
334 O << "L" << Name << "$stub";
337 if (!isCallOp) O << '$';
340 if (Subtarget->isPICStyleGOT()) {
341 std::string GOTName(TAI->getGlobalPrefix());
342 GOTName+="_GLOBAL_OFFSET_TABLE_";
344 // Really hack! Emit extra offset to PC during printing GOT offset to
345 // compensate size of popl instruction. The resulting code should look
349 // popl %some_register
350 // addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
351 O << " + [.-" << computePICLabel(getFunctionNumber(), Subtarget) << "]";
354 if (isCallOp && Subtarget->isPICStyleGOT())
357 if (!isCallOp && Subtarget->is64Bit())
363 O << "<unknown operand type>"; return;
367 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
368 unsigned char value = MI->getOperand(Op).getImmedValue();
369 assert(value <= 7 && "Invalid ssecc argument!");
371 case 0: O << "eq"; break;
372 case 1: O << "lt"; break;
373 case 2: O << "le"; break;
374 case 3: O << "unord"; break;
375 case 4: O << "neq"; break;
376 case 5: O << "nlt"; break;
377 case 6: O << "nle"; break;
378 case 7: O << "ord"; break;
382 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
383 const char *Modifier){
384 assert(isMem(MI, Op) && "Invalid memory reference!");
385 MachineOperand BaseReg = MI->getOperand(Op);
386 MachineOperand IndexReg = MI->getOperand(Op+2);
387 const MachineOperand &DispSpec = MI->getOperand(Op+3);
389 bool NotRIPRel = IndexReg.getReg() || BaseReg.getReg();
390 if (DispSpec.isGlobalAddress() ||
391 DispSpec.isConstantPoolIndex() ||
392 DispSpec.isJumpTableIndex()) {
393 printOperand(MI, Op+3, "mem", NotRIPRel);
395 int DispVal = DispSpec.getImmedValue();
396 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
400 if (IndexReg.getReg() || BaseReg.getReg()) {
401 unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue();
402 unsigned BaseRegOperand = 0, IndexRegOperand = 2;
404 // There are cases where we can end up with ESP/RSP in the indexreg slot.
405 // If this happens, swap the base/index register to support assemblers that
406 // don't work when the index is *SP.
407 if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
408 assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
409 std::swap(BaseReg, IndexReg);
410 std::swap(BaseRegOperand, IndexRegOperand);
414 if (BaseReg.getReg())
415 printOperand(MI, Op+BaseRegOperand, Modifier);
417 if (IndexReg.getReg()) {
419 printOperand(MI, Op+IndexRegOperand, Modifier);
421 O << "," << ScaleVal;
427 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
428 std::string label = computePICLabel(getFunctionNumber(), Subtarget);
429 O << label << "\n" << label << ":";
433 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
435 const MRegisterInfo &RI = *TM.getRegisterInfo();
436 unsigned Reg = MO.getReg();
438 default: return true; // Unknown mode.
439 case 'b': // Print QImode register
440 Reg = getX86SubSuperRegister(Reg, MVT::i8);
442 case 'h': // Print QImode high register
443 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
445 case 'w': // Print HImode register
446 Reg = getX86SubSuperRegister(Reg, MVT::i16);
448 case 'k': // Print SImode register
449 Reg = getX86SubSuperRegister(Reg, MVT::i32);
454 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
455 O << (char)tolower(*Name);
459 /// PrintAsmOperand - Print out an operand for an inline asm expression.
461 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
463 const char *ExtraCode) {
464 // Does this asm operand have a single letter operand modifier?
465 if (ExtraCode && ExtraCode[0]) {
466 if (ExtraCode[1] != 0) return true; // Unknown modifier.
468 switch (ExtraCode[0]) {
469 default: return true; // Unknown modifier.
470 case 'c': // Don't print "$" before a global var name.
471 printOperand(MI, OpNo, "mem");
473 case 'b': // Print QImode register
474 case 'h': // Print QImode high register
475 case 'w': // Print HImode register
476 case 'k': // Print SImode register
477 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
481 printOperand(MI, OpNo);
485 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
488 const char *ExtraCode) {
489 if (ExtraCode && ExtraCode[0])
490 return true; // Unknown modifier.
491 printMemReference(MI, OpNo);
495 /// printMachineInstruction -- Print out a single X86 LLVM instruction
496 /// MI in Intel syntax to the current output stream.
498 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
501 // See if a truncate instruction can be turned into a nop.
502 switch (MI->getOpcode()) {
504 case X86::TRUNC_64to32:
505 case X86::TRUNC_64to16:
506 case X86::TRUNC_32to16:
507 case X86::TRUNC_32to8:
508 case X86::TRUNC_16to8:
509 case X86::TRUNC_32_to8:
510 case X86::TRUNC_16_to8: {
511 const MachineOperand &MO0 = MI->getOperand(0);
512 const MachineOperand &MO1 = MI->getOperand(1);
513 unsigned Reg0 = MO0.getReg();
514 unsigned Reg1 = MO1.getReg();
515 unsigned Opc = MI->getOpcode();
516 if (Opc == X86::TRUNC_64to32)
517 Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
518 else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
519 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
521 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
522 O << TAI->getCommentString() << " TRUNCATE ";
527 case X86::PsMOVZX64rr32:
528 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
532 // Call the autogenerated instruction printer routines.
533 printInstruction(MI);
536 // Include the auto-generated portion of the assembly writer.
537 #include "X86GenAsmWriter.inc"