1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/ELFObjectWriter.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCObjectFormat.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionCOFF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSectionMachO.h"
22 #include "llvm/MC/MachObjectWriter.h"
23 #include "llvm/Support/ELF.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetRegistry.h"
27 #include "llvm/Target/TargetAsmBackend.h"
31 static unsigned getFixupKindLog2Size(unsigned Kind) {
33 default: assert(0 && "invalid fixup kind!");
34 case X86::reloc_pcrel_1byte:
35 case FK_Data_1: return 0;
36 case X86::reloc_pcrel_2byte:
37 case FK_Data_2: return 1;
38 case X86::reloc_pcrel_4byte:
39 case X86::reloc_riprel_4byte:
40 case X86::reloc_riprel_4byte_movq_load:
41 case X86::reloc_signed_4byte:
42 case FK_Data_4: return 2;
43 case FK_Data_8: return 3;
48 class X86AsmBackend : public TargetAsmBackend {
50 X86AsmBackend(const Target &T)
51 : TargetAsmBackend(T) {}
53 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
54 uint64_t Value) const {
55 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());
57 assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
58 "Invalid fixup offset!");
59 for (unsigned i = 0; i != Size; ++i)
60 DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
63 bool MayNeedRelaxation(const MCInst &Inst) const;
65 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
67 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
69 } // end anonymous namespace
71 static unsigned getRelaxedOpcode(unsigned Op) {
76 // This is used on i386 with things like addl $foo, %ebx
77 // FIXME: Should the other *i8 instructions be here too? If not, it might
78 // be better to just select X86::ADD32ri instead of X86::ADD32ri8.
79 case X86::ADD32ri8: return X86::ADD32ri;
81 case X86::JAE_1: return X86::JAE_4;
82 case X86::JA_1: return X86::JA_4;
83 case X86::JBE_1: return X86::JBE_4;
84 case X86::JB_1: return X86::JB_4;
85 case X86::JE_1: return X86::JE_4;
86 case X86::JGE_1: return X86::JGE_4;
87 case X86::JG_1: return X86::JG_4;
88 case X86::JLE_1: return X86::JLE_4;
89 case X86::JL_1: return X86::JL_4;
90 case X86::JMP_1: return X86::JMP_4;
91 case X86::JNE_1: return X86::JNE_4;
92 case X86::JNO_1: return X86::JNO_4;
93 case X86::JNP_1: return X86::JNP_4;
94 case X86::JNS_1: return X86::JNS_4;
95 case X86::JO_1: return X86::JO_4;
96 case X86::JP_1: return X86::JP_4;
97 case X86::JS_1: return X86::JS_4;
101 bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
102 // Check if this instruction is ever relaxable.
103 if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
106 // If so, just assume it can be relaxed. Once we support relaxing more complex
107 // instructions we should check that the instruction actually has symbolic
108 // operands before doing this, but we need to be careful about things like
113 // FIXME: Can tblgen help at all here to verify there aren't other instructions
115 void X86AsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
116 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
117 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode());
119 if (RelaxedOp == Inst.getOpcode()) {
120 SmallString<256> Tmp;
121 raw_svector_ostream OS(Tmp);
122 Inst.dump_pretty(OS);
124 report_fatal_error("unexpected instruction to relax: " + OS.str());
128 Res.setOpcode(RelaxedOp);
131 /// WriteNopData - Write optimal nops to the output file for the \arg Count
132 /// bytes. This returns the number of bytes written. It may return 0 if
133 /// the \arg Count is more than the maximum optimal nops.
135 /// FIXME this is X86 32-bit specific and should move to a better place.
136 bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
137 static const uint8_t Nops[16][16] = {
145 {0x0f, 0x1f, 0x40, 0x00},
146 // nopl 0(%[re]ax,%[re]ax,1)
147 {0x0f, 0x1f, 0x44, 0x00, 0x00},
148 // nopw 0(%[re]ax,%[re]ax,1)
149 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
151 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
152 // nopl 0L(%[re]ax,%[re]ax,1)
153 {0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
154 // nopw 0L(%[re]ax,%[re]ax,1)
155 {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
156 // nopw %cs:0L(%[re]ax,%[re]ax,1)
157 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
158 // nopl 0(%[re]ax,%[re]ax,1)
159 // nopw 0(%[re]ax,%[re]ax,1)
160 {0x0f, 0x1f, 0x44, 0x00, 0x00,
161 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
162 // nopw 0(%[re]ax,%[re]ax,1)
163 // nopw 0(%[re]ax,%[re]ax,1)
164 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
165 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
166 // nopw 0(%[re]ax,%[re]ax,1)
167 // nopl 0L(%[re]ax) */
168 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
169 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
172 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
173 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
175 // nopl 0L(%[re]ax,%[re]ax,1)
176 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
177 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}
180 // Write an optimal sequence for the first 15 bytes.
181 uint64_t OptimalCount = (Count < 16) ? Count : 15;
182 for (uint64_t i = 0, e = OptimalCount; i != e; i++)
183 OW->Write8(Nops[OptimalCount - 1][i]);
185 // Finish with single byte nops.
186 for (uint64_t i = OptimalCount, e = Count; i != e; ++i)
195 class ELFX86AsmBackend : public X86AsmBackend {
196 MCELFObjectFormat Format;
199 Triple::OSType OSType;
200 ELFX86AsmBackend(const Target &T, Triple::OSType _OSType)
201 : X86AsmBackend(T), OSType(_OSType) {
202 HasScatteredSymbols = true;
203 HasReliableSymbolDifference = true;
206 virtual const MCObjectFormat &getObjectFormat() const {
210 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
211 const MCSectionELF &ES = static_cast<const MCSectionELF&>(Section);
212 return ES.getFlags() & MCSectionELF::SHF_MERGE;
215 bool isVirtualSection(const MCSection &Section) const {
216 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
217 return SE.getType() == MCSectionELF::SHT_NOBITS;
221 class ELFX86_32AsmBackend : public ELFX86AsmBackend {
223 ELFX86_32AsmBackend(const Target &T, Triple::OSType OSType)
224 : ELFX86AsmBackend(T, OSType) {}
226 unsigned getPointerSize() const {
230 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
231 return new ELFObjectWriter(OS, /*Is64Bit=*/false,
233 /*IsLittleEndian=*/true,
234 /*HasRelocationAddend=*/false);
238 class ELFX86_64AsmBackend : public ELFX86AsmBackend {
240 ELFX86_64AsmBackend(const Target &T, Triple::OSType OSType)
241 : ELFX86AsmBackend(T, OSType) {}
243 unsigned getPointerSize() const {
247 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
248 return new ELFObjectWriter(OS, /*Is64Bit=*/true,
249 OSType, ELF::EM_X86_64,
250 /*IsLittleEndian=*/true,
251 /*HasRelocationAddend=*/true);
255 class WindowsX86AsmBackend : public X86AsmBackend {
257 MCCOFFObjectFormat Format;
260 WindowsX86AsmBackend(const Target &T, bool is64Bit)
263 HasScatteredSymbols = true;
266 virtual const MCObjectFormat &getObjectFormat() const {
270 unsigned getPointerSize() const {
277 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
278 return createWinCOFFObjectWriter(OS, Is64Bit);
281 bool isVirtualSection(const MCSection &Section) const {
282 const MCSectionCOFF &SE = static_cast<const MCSectionCOFF&>(Section);
283 return SE.getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA;
287 class DarwinX86AsmBackend : public X86AsmBackend {
288 MCMachOObjectFormat Format;
291 DarwinX86AsmBackend(const Target &T)
293 HasScatteredSymbols = true;
296 virtual const MCObjectFormat &getObjectFormat() const {
300 bool isVirtualSection(const MCSection &Section) const {
301 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
302 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
303 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
304 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
308 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
310 DarwinX86_32AsmBackend(const Target &T)
311 : DarwinX86AsmBackend(T) {}
313 unsigned getPointerSize() const {
317 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
318 return new MachObjectWriter(OS, /*Is64Bit=*/false);
322 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
324 DarwinX86_64AsmBackend(const Target &T)
325 : DarwinX86AsmBackend(T) {
326 HasReliableSymbolDifference = true;
329 unsigned getPointerSize() const {
333 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
334 return new MachObjectWriter(OS, /*Is64Bit=*/true);
337 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
338 // Temporary labels in the string literals sections require symbols. The
339 // issue is that the x86_64 relocation format does not allow symbol +
340 // offset, and so the linker does not have enough information to resolve the
341 // access to the appropriate atom unless an external relocation is used. For
342 // non-cstring sections, we expect the compiler to use a non-temporary label
343 // for anything that could have an addend pointing outside the symbol.
345 // See <rdar://problem/4765733>.
346 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
347 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
350 virtual bool isSectionAtomizable(const MCSection &Section) const {
351 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
352 // Fixed sized data sections are uniqued, they cannot be diced into atoms.
353 switch (SMO.getType()) {
357 case MCSectionMachO::S_4BYTE_LITERALS:
358 case MCSectionMachO::S_8BYTE_LITERALS:
359 case MCSectionMachO::S_16BYTE_LITERALS:
360 case MCSectionMachO::S_LITERAL_POINTERS:
361 case MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS:
362 case MCSectionMachO::S_LAZY_SYMBOL_POINTERS:
363 case MCSectionMachO::S_MOD_INIT_FUNC_POINTERS:
364 case MCSectionMachO::S_MOD_TERM_FUNC_POINTERS:
365 case MCSectionMachO::S_INTERPOSING:
371 } // end anonymous namespace
373 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
374 const std::string &TT) {
375 switch (Triple(TT).getOS()) {
377 return new DarwinX86_32AsmBackend(T);
378 case Triple::MinGW32:
381 return new WindowsX86AsmBackend(T, false);
383 return new ELFX86_32AsmBackend(T, Triple(TT).getOS());
387 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
388 const std::string &TT) {
389 switch (Triple(TT).getOS()) {
391 return new DarwinX86_64AsmBackend(T);
392 case Triple::MinGW64:
395 return new WindowsX86AsmBackend(T, true);
397 return new ELFX86_64AsmBackend(T, Triple(TT).getOS());