1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/ELFObjectWriter.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCObjectFormat.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionCOFF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSectionMachO.h"
22 #include "llvm/MC/MachObjectWriter.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
25 #include "llvm/Target/TargetRegistry.h"
26 #include "llvm/Target/TargetAsmBackend.h"
30 static unsigned getFixupKindLog2Size(unsigned Kind) {
32 default: assert(0 && "invalid fixup kind!");
33 case X86::reloc_pcrel_1byte:
34 case FK_Data_1: return 0;
35 case X86::reloc_pcrel_2byte:
36 case FK_Data_2: return 1;
37 case X86::reloc_pcrel_4byte:
38 case X86::reloc_riprel_4byte:
39 case X86::reloc_riprel_4byte_movq_load:
40 case X86::reloc_signed_4byte:
41 case FK_Data_4: return 2;
42 case FK_Data_8: return 3;
47 class X86AsmBackend : public TargetAsmBackend {
49 X86AsmBackend(const Target &T)
50 : TargetAsmBackend(T) {}
52 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
53 uint64_t Value) const {
54 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());
56 assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
57 "Invalid fixup offset!");
58 for (unsigned i = 0; i != Size; ++i)
59 DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
62 bool MayNeedRelaxation(const MCInst &Inst) const;
64 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
66 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
68 } // end anonymous namespace
70 static unsigned getRelaxedOpcode(unsigned Op) {
75 // This is used on i386 with things like addl $foo, %ebx
76 // FIXME: Should the other *i8 instructions be here too? If not, it might
77 // be better to just select X86::ADD32ri instead of X86::ADD32ri8.
78 case X86::ADD32ri8: return X86::ADD32ri;
80 case X86::JAE_1: return X86::JAE_4;
81 case X86::JA_1: return X86::JA_4;
82 case X86::JBE_1: return X86::JBE_4;
83 case X86::JB_1: return X86::JB_4;
84 case X86::JE_1: return X86::JE_4;
85 case X86::JGE_1: return X86::JGE_4;
86 case X86::JG_1: return X86::JG_4;
87 case X86::JLE_1: return X86::JLE_4;
88 case X86::JL_1: return X86::JL_4;
89 case X86::JMP_1: return X86::JMP_4;
90 case X86::JNE_1: return X86::JNE_4;
91 case X86::JNO_1: return X86::JNO_4;
92 case X86::JNP_1: return X86::JNP_4;
93 case X86::JNS_1: return X86::JNS_4;
94 case X86::JO_1: return X86::JO_4;
95 case X86::JP_1: return X86::JP_4;
96 case X86::JS_1: return X86::JS_4;
100 bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
101 // Check if this instruction is ever relaxable.
102 if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
105 // If so, just assume it can be relaxed. Once we support relaxing more complex
106 // instructions we should check that the instruction actually has symbolic
107 // operands before doing this, but we need to be careful about things like
112 // FIXME: Can tblgen help at all here to verify there aren't other instructions
114 void X86AsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
115 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
116 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode());
118 if (RelaxedOp == Inst.getOpcode()) {
119 SmallString<256> Tmp;
120 raw_svector_ostream OS(Tmp);
121 Inst.dump_pretty(OS);
123 report_fatal_error("unexpected instruction to relax: " + OS.str());
127 Res.setOpcode(RelaxedOp);
130 /// WriteNopData - Write optimal nops to the output file for the \arg Count
131 /// bytes. This returns the number of bytes written. It may return 0 if
132 /// the \arg Count is more than the maximum optimal nops.
134 /// FIXME this is X86 32-bit specific and should move to a better place.
135 bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
136 static const uint8_t Nops[16][16] = {
144 {0x0f, 0x1f, 0x40, 0x00},
145 // nopl 0(%[re]ax,%[re]ax,1)
146 {0x0f, 0x1f, 0x44, 0x00, 0x00},
147 // nopw 0(%[re]ax,%[re]ax,1)
148 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
150 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
151 // nopl 0L(%[re]ax,%[re]ax,1)
152 {0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
153 // nopw 0L(%[re]ax,%[re]ax,1)
154 {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
155 // nopw %cs:0L(%[re]ax,%[re]ax,1)
156 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
157 // nopl 0(%[re]ax,%[re]ax,1)
158 // nopw 0(%[re]ax,%[re]ax,1)
159 {0x0f, 0x1f, 0x44, 0x00, 0x00,
160 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
161 // nopw 0(%[re]ax,%[re]ax,1)
162 // nopw 0(%[re]ax,%[re]ax,1)
163 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
164 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
165 // nopw 0(%[re]ax,%[re]ax,1)
166 // nopl 0L(%[re]ax) */
167 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
168 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
171 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
172 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
174 // nopl 0L(%[re]ax,%[re]ax,1)
175 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
176 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}
179 // Write an optimal sequence for the first 15 bytes.
180 uint64_t OptimalCount = (Count < 16) ? Count : 15;
181 for (uint64_t i = 0, e = OptimalCount; i != e; i++)
182 OW->Write8(Nops[OptimalCount - 1][i]);
184 // Finish with single byte nops.
185 for (uint64_t i = OptimalCount, e = Count; i != e; ++i)
194 class ELFX86AsmBackend : public X86AsmBackend {
195 MCELFObjectFormat Format;
198 Triple::OSType OSType;
199 ELFX86AsmBackend(const Target &T, Triple::OSType _OSType)
200 : X86AsmBackend(T), OSType(_OSType) {
201 HasScatteredSymbols = true;
202 HasReliableSymbolDifference = true;
205 virtual const MCObjectFormat &getObjectFormat() const {
209 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
210 const MCSectionELF &ES = static_cast<const MCSectionELF&>(Section);
211 return ES.getFlags() & MCSectionELF::SHF_MERGE;
214 bool isVirtualSection(const MCSection &Section) const {
215 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
216 return SE.getType() == MCSectionELF::SHT_NOBITS;
220 class ELFX86_32AsmBackend : public ELFX86AsmBackend {
222 ELFX86_32AsmBackend(const Target &T, Triple::OSType OSType)
223 : ELFX86AsmBackend(T, OSType) {}
225 unsigned getPointerSize() const {
229 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
230 return new ELFObjectWriter(OS, /*Is64Bit=*/false,
232 /*IsLittleEndian=*/true,
233 /*HasRelocationAddend=*/false);
237 class ELFX86_64AsmBackend : public ELFX86AsmBackend {
239 ELFX86_64AsmBackend(const Target &T, Triple::OSType OSType)
240 : ELFX86AsmBackend(T, OSType) {}
242 unsigned getPointerSize() const {
246 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
247 return new ELFObjectWriter(OS, /*Is64Bit=*/true,
249 /*IsLittleEndian=*/true,
250 /*HasRelocationAddend=*/true);
254 class WindowsX86AsmBackend : public X86AsmBackend {
256 MCCOFFObjectFormat Format;
259 WindowsX86AsmBackend(const Target &T, bool is64Bit)
262 HasScatteredSymbols = true;
265 virtual const MCObjectFormat &getObjectFormat() const {
269 unsigned getPointerSize() const {
276 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
277 return createWinCOFFObjectWriter(OS, Is64Bit);
280 bool isVirtualSection(const MCSection &Section) const {
281 const MCSectionCOFF &SE = static_cast<const MCSectionCOFF&>(Section);
282 return SE.getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA;
286 class DarwinX86AsmBackend : public X86AsmBackend {
287 MCMachOObjectFormat Format;
290 DarwinX86AsmBackend(const Target &T)
292 HasScatteredSymbols = true;
295 virtual const MCObjectFormat &getObjectFormat() const {
299 bool isVirtualSection(const MCSection &Section) const {
300 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
301 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
302 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
303 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
307 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
309 DarwinX86_32AsmBackend(const Target &T)
310 : DarwinX86AsmBackend(T) {}
312 unsigned getPointerSize() const {
316 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
317 return new MachObjectWriter(OS, /*Is64Bit=*/false);
321 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
323 DarwinX86_64AsmBackend(const Target &T)
324 : DarwinX86AsmBackend(T) {
325 HasReliableSymbolDifference = true;
328 unsigned getPointerSize() const {
332 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
333 return new MachObjectWriter(OS, /*Is64Bit=*/true);
336 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
337 // Temporary labels in the string literals sections require symbols. The
338 // issue is that the x86_64 relocation format does not allow symbol +
339 // offset, and so the linker does not have enough information to resolve the
340 // access to the appropriate atom unless an external relocation is used. For
341 // non-cstring sections, we expect the compiler to use a non-temporary label
342 // for anything that could have an addend pointing outside the symbol.
344 // See <rdar://problem/4765733>.
345 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
346 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
349 virtual bool isSectionAtomizable(const MCSection &Section) const {
350 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
351 // Fixed sized data sections are uniqued, they cannot be diced into atoms.
352 switch (SMO.getType()) {
356 case MCSectionMachO::S_4BYTE_LITERALS:
357 case MCSectionMachO::S_8BYTE_LITERALS:
358 case MCSectionMachO::S_16BYTE_LITERALS:
359 case MCSectionMachO::S_LITERAL_POINTERS:
360 case MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS:
361 case MCSectionMachO::S_LAZY_SYMBOL_POINTERS:
362 case MCSectionMachO::S_MOD_INIT_FUNC_POINTERS:
363 case MCSectionMachO::S_MOD_TERM_FUNC_POINTERS:
364 case MCSectionMachO::S_INTERPOSING:
370 } // end anonymous namespace
372 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
373 const std::string &TT) {
374 switch (Triple(TT).getOS()) {
376 return new DarwinX86_32AsmBackend(T);
377 case Triple::MinGW32:
380 return new WindowsX86AsmBackend(T, false);
382 return new ELFX86_32AsmBackend(T, Triple(TT).getOS());
386 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
387 const std::string &TT) {
388 switch (Triple(TT).getOS()) {
390 return new DarwinX86_64AsmBackend(T);
391 case Triple::MinGW64:
394 return new WindowsX86AsmBackend(T, true);
396 return new ELFX86_64AsmBackend(T, Triple(TT).getOS());