1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionELF.h"
18 #include "llvm/MC/MCSectionMachO.h"
19 #include "llvm/MC/MachObjectWriter.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetRegistry.h"
23 #include "llvm/Target/TargetAsmBackend.h"
28 static unsigned getFixupKindLog2Size(unsigned Kind) {
30 default: assert(0 && "invalid fixup kind!");
31 case X86::reloc_pcrel_1byte:
32 case FK_Data_1: return 0;
33 case FK_Data_2: return 1;
34 case X86::reloc_pcrel_4byte:
35 case X86::reloc_riprel_4byte:
36 case X86::reloc_riprel_4byte_movq_load:
37 case FK_Data_4: return 2;
38 case FK_Data_8: return 3;
42 class X86AsmBackend : public TargetAsmBackend {
44 X86AsmBackend(const Target &T)
45 : TargetAsmBackend(T) {}
47 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
48 uint64_t Value) const {
49 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());
51 assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
52 "Invalid fixup offset!");
53 for (unsigned i = 0; i != Size; ++i)
54 DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
57 bool MayNeedRelaxation(const MCInst &Inst) const;
59 void RelaxInstruction(const MCInstFragment *IF, MCInst &Res) const;
61 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
64 static unsigned getRelaxedOpcode(unsigned Op) {
69 case X86::JAE_1: return X86::JAE_4;
70 case X86::JA_1: return X86::JA_4;
71 case X86::JBE_1: return X86::JBE_4;
72 case X86::JB_1: return X86::JB_4;
73 case X86::JE_1: return X86::JE_4;
74 case X86::JGE_1: return X86::JGE_4;
75 case X86::JG_1: return X86::JG_4;
76 case X86::JLE_1: return X86::JLE_4;
77 case X86::JL_1: return X86::JL_4;
79 case X86::JMP_1: return X86::JMP_4;
80 case X86::JNE_1: return X86::JNE_4;
81 case X86::JNO_1: return X86::JNO_4;
82 case X86::JNP_1: return X86::JNP_4;
83 case X86::JNS_1: return X86::JNS_4;
84 case X86::JO_1: return X86::JO_4;
85 case X86::JP_1: return X86::JP_4;
86 case X86::JS_1: return X86::JS_4;
90 bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
91 // Check if this instruction is ever relaxable.
92 if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
95 // If so, just assume it can be relaxed. Once we support relaxing more complex
96 // instructions we should check that the instruction actually has symbolic
97 // operands before doing this, but we need to be careful about things like
102 // FIXME: Can tblgen help at all here to verify there aren't other instructions
104 void X86AsmBackend::RelaxInstruction(const MCInstFragment *IF,
106 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
107 unsigned RelaxedOp = getRelaxedOpcode(IF->getInst().getOpcode());
109 if (RelaxedOp == IF->getInst().getOpcode()) {
110 SmallString<256> Tmp;
111 raw_svector_ostream OS(Tmp);
112 IF->getInst().dump_pretty(OS);
114 report_fatal_error("unexpected instruction to relax: " + OS.str());
118 Res.setOpcode(RelaxedOp);
121 /// WriteNopData - Write optimal nops to the output file for the \arg Count
122 /// bytes. This returns the number of bytes written. It may return 0 if
123 /// the \arg Count is more than the maximum optimal nops.
125 /// FIXME this is X86 32-bit specific and should move to a better place.
126 bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
127 static const uint8_t Nops[16][16] = {
135 {0x0f, 0x1f, 0x40, 0x00},
136 // nopl 0(%[re]ax,%[re]ax,1)
137 {0x0f, 0x1f, 0x44, 0x00, 0x00},
138 // nopw 0(%[re]ax,%[re]ax,1)
139 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
141 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
142 // nopl 0L(%[re]ax,%[re]ax,1)
143 {0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
144 // nopw 0L(%[re]ax,%[re]ax,1)
145 {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
146 // nopw %cs:0L(%[re]ax,%[re]ax,1)
147 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
148 // nopl 0(%[re]ax,%[re]ax,1)
149 // nopw 0(%[re]ax,%[re]ax,1)
150 {0x0f, 0x1f, 0x44, 0x00, 0x00,
151 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
152 // nopw 0(%[re]ax,%[re]ax,1)
153 // nopw 0(%[re]ax,%[re]ax,1)
154 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
155 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
156 // nopw 0(%[re]ax,%[re]ax,1)
157 // nopl 0L(%[re]ax) */
158 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
159 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
162 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
163 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
165 // nopl 0L(%[re]ax,%[re]ax,1)
166 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
167 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}
170 // Write an optimal sequence for the first 15 bytes.
171 uint64_t OptimalCount = (Count < 16) ? Count : 15;
172 for (uint64_t i = 0, e = OptimalCount; i != e; i++)
173 OW->Write8(Nops[OptimalCount - 1][i]);
175 // Finish with single byte nops.
176 for (uint64_t i = OptimalCount, e = Count; i != e; ++i)
184 class ELFX86AsmBackend : public X86AsmBackend {
186 ELFX86AsmBackend(const Target &T)
188 HasAbsolutizedSet = true;
189 HasScatteredSymbols = true;
192 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
196 bool isVirtualSection(const MCSection &Section) const {
197 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
198 return SE.getType() == MCSectionELF::SHT_NOBITS;;
202 class ELFX86_32AsmBackend : public ELFX86AsmBackend {
204 ELFX86_32AsmBackend(const Target &T)
205 : ELFX86AsmBackend(T) {}
208 class ELFX86_64AsmBackend : public ELFX86AsmBackend {
210 ELFX86_64AsmBackend(const Target &T)
211 : ELFX86AsmBackend(T) {}
214 class DarwinX86AsmBackend : public X86AsmBackend {
216 DarwinX86AsmBackend(const Target &T)
218 HasAbsolutizedSet = true;
219 HasScatteredSymbols = true;
222 bool isVirtualSection(const MCSection &Section) const {
223 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
224 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
225 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
226 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
230 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
232 DarwinX86_32AsmBackend(const Target &T)
233 : DarwinX86AsmBackend(T) {}
235 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
236 return new MachObjectWriter(OS, /*Is64Bit=*/false);
240 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
242 DarwinX86_64AsmBackend(const Target &T)
243 : DarwinX86AsmBackend(T) {
244 HasReliableSymbolDifference = true;
247 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
248 return new MachObjectWriter(OS, /*Is64Bit=*/true);
251 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
252 // Temporary labels in the string literals sections require symbols. The
253 // issue is that the x86_64 relocation format does not allow symbol +
254 // offset, and so the linker does not have enough information to resolve the
255 // access to the appropriate atom unless an external relocation is used. For
256 // non-cstring sections, we expect the compiler to use a non-temporary label
257 // for anything that could have an addend pointing outside the symbol.
259 // See <rdar://problem/4765733>.
260 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
261 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
264 virtual bool isSectionAtomizable(const MCSection &Section) const {
265 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
266 // Fixed sized data sections are uniqued, they cannot be diced into atoms.
267 switch (SMO.getType()) {
271 case MCSectionMachO::S_4BYTE_LITERALS:
272 case MCSectionMachO::S_8BYTE_LITERALS:
273 case MCSectionMachO::S_16BYTE_LITERALS:
274 case MCSectionMachO::S_LITERAL_POINTERS:
275 case MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS:
276 case MCSectionMachO::S_LAZY_SYMBOL_POINTERS:
277 case MCSectionMachO::S_MOD_INIT_FUNC_POINTERS:
278 case MCSectionMachO::S_MOD_TERM_FUNC_POINTERS:
279 case MCSectionMachO::S_INTERPOSING:
287 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
288 const std::string &TT) {
289 switch (Triple(TT).getOS()) {
291 return new DarwinX86_32AsmBackend(T);
293 return new ELFX86_32AsmBackend(T);
297 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
298 const std::string &TT) {
299 switch (Triple(TT).getOS()) {
301 return new DarwinX86_64AsmBackend(T);
303 return new ELFX86_64AsmBackend(T);