1 //===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the X86-32 and X86-64
13 //===----------------------------------------------------------------------===//
15 /// CCIfSubtarget - Match if the current subtarget has a feature F.
16 class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>;
19 //===----------------------------------------------------------------------===//
20 // Return Value Calling Conventions
21 //===----------------------------------------------------------------------===//
23 // Return-value conventions common to all X86 CC's.
24 def RetCC_X86Common : CallingConv<[
25 // Scalar values are returned in AX first, then DX.
26 CCIfType<[i8] , CCAssignToReg<[AL]>>,
27 CCIfType<[i16], CCAssignToReg<[AX, DX]>>,
28 CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
29 CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
31 // Vector types are returned in XMM0 and XMM1, when they fit. If the target
32 // doesn't have XMM registers, it won't have vector types.
33 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
34 CCAssignToReg<[XMM0,XMM1]>>,
36 // MMX vector types are always returned in MM0. If the target doesn't have
37 // MM0, it doesn't support these vector types.
38 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[MM0]>>,
40 // Long double types are always returned in ST0 (even with SSE).
41 CCIfType<[f80], CCAssignToReg<[ST0, ST1]>>
44 // X86-32 C return-value convention.
45 def RetCC_X86_32_C : CallingConv<[
46 // The X86-32 calling convention returns FP values in ST0, otherwise it is the
47 // same as the common X86 calling conv.
48 CCIfType<[f32], CCAssignToReg<[ST0, ST1]>>,
49 CCIfType<[f64], CCAssignToReg<[ST0, ST1]>>,
50 CCDelegateTo<RetCC_X86Common>
53 // X86-32 FastCC return-value convention.
54 def RetCC_X86_32_Fast : CallingConv<[
55 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
56 // SSE2, otherwise it is the the C calling conventions.
57 // This can happen when a float, 2 x float, or 3 x float vector is split by
58 // target lowering, and is returned in 1-3 sse regs.
59 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
60 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
61 CCDelegateTo<RetCC_X86Common>
64 // X86-32 SSEregparm return-value convention.
65 def RetCC_X86_32_SSE : CallingConv<[
66 // The X86-32 sseregparm calling convention returns FP values in XMM0 if the
67 // target has SSE2, otherwise it is the C calling convention.
68 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0, XMM1]>>>,
69 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0, XMM1]>>>,
70 CCDelegateTo<RetCC_X86Common>
73 // X86-64 C return-value convention.
74 def RetCC_X86_64_C : CallingConv<[
75 // The X86-64 calling convention always returns FP values in XMM0.
76 CCIfType<[f32], CCAssignToReg<[XMM0, XMM1]>>,
77 CCIfType<[f64], CCAssignToReg<[XMM0, XMM1]>>,
78 CCDelegateTo<RetCC_X86Common>
81 // X86-Win64 C return-value convention.
82 def RetCC_X86_Win64_C : CallingConv<[
83 // The X86-Win64 calling convention always returns __m64 values in RAX.
84 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[RAX]>>,
86 // And FP in XMM0 only.
87 CCIfType<[f32], CCAssignToReg<[XMM0]>>,
88 CCIfType<[f64], CCAssignToReg<[XMM0]>>,
90 // Otherwise, everything is the same as 'normal' X86-64 C CC.
91 CCDelegateTo<RetCC_X86_64_C>
95 // This is the root return-value convention for the X86-32 backend.
96 def RetCC_X86_32 : CallingConv<[
97 // If FastCC, use RetCC_X86_32_Fast.
98 CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
99 // If SSECC, use RetCC_X86_32_SSE.
100 CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
101 // Otherwise, use RetCC_X86_32_C.
102 CCDelegateTo<RetCC_X86_32_C>
105 // This is the root return-value convention for the X86-64 backend.
106 def RetCC_X86_64 : CallingConv<[
107 // Mingw64 and native Win64 use Win64 CC
108 CCIfSubtarget<"isTargetWin64()", CCDelegateTo<RetCC_X86_Win64_C>>,
110 // Otherwise, drop to normal X86-64 CC
111 CCDelegateTo<RetCC_X86_64_C>
114 // This is the return-value convention used for the entire X86 backend.
115 def RetCC_X86 : CallingConv<[
116 CCIfSubtarget<"is64Bit()", CCDelegateTo<RetCC_X86_64>>,
117 CCDelegateTo<RetCC_X86_32>
120 //===----------------------------------------------------------------------===//
121 // X86-64 Argument Calling Conventions
122 //===----------------------------------------------------------------------===//
124 def CC_X86_64_C : CallingConv<[
125 // Handles byval parameters.
126 CCIfByVal<CCPassByVal<8, 8>>,
128 // Promote i8/i16 arguments to i32.
129 CCIfType<[i8, i16], CCPromoteToType<i32>>,
131 // The 'nest' parameter, if any, is passed in R10.
132 CCIfNest<CCAssignToReg<[R10]>>,
134 // The first 6 integer arguments are passed in integer registers.
135 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
136 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
138 // The first 8 FP/Vector arguments are passed in XMM registers.
139 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
140 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
142 // The first 8 MMX (except for v1i64) vector arguments are passed in XMM
143 // registers on Darwin.
144 CCIfType<[v8i8, v4i16, v2i32],
145 CCIfSubtarget<"isTargetDarwin()",
146 CCIfSubtarget<"hasSSE2()",
147 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>>,
149 // The first 8 v1i64 vector arguments are passed in GPRs on Darwin.
151 CCIfSubtarget<"isTargetDarwin()",
152 CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>>,
154 // Integer/FP values get stored in stack slots that are 8 bytes in size and
155 // 8-byte aligned if there are no more registers to hold them.
156 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
158 // Long doubles get stack slots whose size and alignment depends on the
160 CCIfType<[f80], CCAssignToStack<0, 0>>,
162 // Vectors get 16-byte stack slots that are 16-byte aligned.
163 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
165 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
166 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
169 // Calling convention used on Win64
170 def CC_X86_Win64_C : CallingConv<[
171 // FIXME: Handle byval stuff.
172 // FIXME: Handle varargs.
174 // Promote i8/i16 arguments to i32.
175 CCIfType<[i8, i16], CCPromoteToType<i32>>,
177 // The 'nest' parameter, if any, is passed in R10.
178 CCIfNest<CCAssignToReg<[R10]>>,
180 // The first 4 integer arguments are passed in integer registers.
181 CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],
182 [XMM0, XMM1, XMM2, XMM3]>>,
183 CCIfType<[i64], CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ],
184 [XMM0, XMM1, XMM2, XMM3]>>,
186 // The first 4 FP/Vector arguments are passed in XMM registers.
187 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
188 CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3],
189 [RCX , RDX , R8 , R9 ]>>,
191 // The first 4 MMX vector arguments are passed in GPRs.
192 CCIfType<[v8i8, v4i16, v2i32, v1i64],
193 CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ],
194 [XMM0, XMM1, XMM2, XMM3]>>,
196 // Integer/FP values get stored in stack slots that are 8 bytes in size and
197 // 16-byte aligned if there are no more registers to hold them.
198 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 16>>,
200 // Long doubles get stack slots whose size and alignment depends on the
202 CCIfType<[f80], CCAssignToStack<0, 0>>,
204 // Vectors get 16-byte stack slots that are 16-byte aligned.
205 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
207 // __m64 vectors get 8-byte stack slots that are 16-byte aligned.
208 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 16>>
211 // Tail call convention (fast): One register is reserved for target address,
213 def CC_X86_64_TailCall : CallingConv<[
214 // Handles byval parameters.
215 CCIfByVal<CCPassByVal<8, 8>>,
217 // Promote i8/i16 arguments to i32.
218 CCIfType<[i8, i16], CCPromoteToType<i32>>,
220 // The 'nest' parameter, if any, is passed in R10.
221 CCIfNest<CCAssignToReg<[R10]>>,
223 // The first 6 integer arguments are passed in integer registers.
224 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D]>>,
225 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
227 // The first 8 FP/Vector arguments are passed in XMM registers.
228 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
229 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
231 // The first 8 MMX (except for v1i64) vector arguments are passed in XMM
232 // registers on Darwin.
233 CCIfType<[v8i8, v4i16, v2i32],
234 CCIfSubtarget<"isTargetDarwin()",
235 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
237 // The first 8 v1i64 vector arguments are passed in GPRs on Darwin.
239 CCIfSubtarget<"isTargetDarwin()",
240 CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>>,
242 // Integer/FP values get stored in stack slots that are 8 bytes in size and
243 // 8-byte aligned if there are no more registers to hold them.
244 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
246 // Vectors get 16-byte stack slots that are 16-byte aligned.
247 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
249 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
250 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
254 //===----------------------------------------------------------------------===//
255 // X86 C Calling Convention
256 //===----------------------------------------------------------------------===//
258 /// CC_X86_32_Common - In all X86-32 calling conventions, extra integers and FP
259 /// values are spilled on the stack, and the first 4 vector values go in XMM
261 def CC_X86_32_Common : CallingConv<[
262 // Handles byval parameters.
263 CCIfByVal<CCPassByVal<4, 4>>,
265 // The first 3 float or double arguments, if marked 'inreg' and if the call
266 // is not a vararg call and if SSE2 is available, are passed in SSE registers.
267 CCIfNotVarArg<CCIfInReg<CCIfType<[f32,f64],
268 CCIfSubtarget<"hasSSE2()",
269 CCAssignToReg<[XMM0,XMM1,XMM2]>>>>>,
271 // The first 3 __m64 (except for v1i64) vector arguments are passed in mmx
272 // registers if the call is not a vararg call.
273 CCIfNotVarArg<CCIfType<[v8i8, v4i16, v2i32],
274 CCAssignToReg<[MM0, MM1, MM2]>>>,
276 // Integer/Float values get stored in stack slots that are 4 bytes in
277 // size and 4-byte aligned.
278 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
280 // Doubles get 8-byte slots that are 4-byte aligned.
281 CCIfType<[f64], CCAssignToStack<8, 4>>,
283 // Long doubles get slots whose size depends on the subtarget.
284 CCIfType<[f80], CCAssignToStack<0, 4>>,
286 // The first 4 SSE vector arguments are passed in XMM registers.
287 CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
288 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>>,
290 // Other SSE vectors get 16-byte stack slots that are 16-byte aligned.
291 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
293 // __m64 vectors get 8-byte stack slots that are 4-byte aligned. They are
294 // passed in the parameter area.
295 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 4>>]>;
297 def CC_X86_32_C : CallingConv<[
298 // Promote i8/i16 arguments to i32.
299 CCIfType<[i8, i16], CCPromoteToType<i32>>,
301 // The 'nest' parameter, if any, is passed in ECX.
302 CCIfNest<CCAssignToReg<[ECX]>>,
304 // The first 3 integer arguments, if marked 'inreg' and if the call is not
305 // a vararg call, are passed in integer registers.
306 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
308 // Otherwise, same as everything else.
309 CCDelegateTo<CC_X86_32_Common>
312 /// Same as C calling convention except for non-free ECX which is used for storing
313 /// a potential pointer to the tail called function.
314 def CC_X86_32_TailCall : CallingConv<[
315 // Promote i8/i16 arguments to i32.
316 CCIfType<[i8, i16], CCPromoteToType<i32>>,
318 // Nested function trampolines are currently not supported by fastcc.
320 // The first 3 integer arguments, if marked 'inreg' and if the call is not
321 // a vararg call, are passed in integer registers.
322 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,
324 // Otherwise, same as everything else.
325 CCDelegateTo<CC_X86_32_Common>
328 def CC_X86_32_FastCall : CallingConv<[
329 // Promote i8/i16 arguments to i32.
330 CCIfType<[i8, i16], CCPromoteToType<i32>>,
332 // The 'nest' parameter, if any, is passed in EAX.
333 CCIfNest<CCAssignToReg<[EAX]>>,
335 // The first 2 integer arguments are passed in ECX/EDX
336 CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
338 // Otherwise, same as everything else.
339 CCDelegateTo<CC_X86_32_Common>