1 //===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the X86-32 and X86-64
13 //===----------------------------------------------------------------------===//
15 /// CCIfSubtarget - Match if the current subtarget has a feature F.
16 class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>;
19 //===----------------------------------------------------------------------===//
20 // Return Value Calling Conventions
21 //===----------------------------------------------------------------------===//
23 // Return-value conventions common to all X86 CC's.
24 def RetCC_X86Common : CallingConv<[
25 // Scalar values are returned in AX first, then DX.
26 CCIfType<[i8] , CCAssignToReg<[AL]>>,
27 CCIfType<[i16], CCAssignToReg<[AX]>>,
28 CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
29 CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
31 // Vector types are returned in XMM0 and XMM1, when they fit. If the target
32 // doesn't have XMM registers, it won't have vector types.
33 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
34 CCAssignToReg<[XMM0,XMM1]>>,
36 // MMX vector types are always returned in MM0. If the target doesn't have
37 // MM0, it doesn't support these vector types.
38 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[MM0]>>,
40 // Long double types are always returned in ST0 (even with SSE).
41 CCIfType<[f80], CCAssignToReg<[ST0]>>
44 // X86-32 C return-value convention.
45 def RetCC_X86_32_C : CallingConv<[
46 // The X86-32 calling convention returns FP values in ST0, otherwise it is the
47 // same as the common X86 calling conv.
48 CCIfType<[f32], CCAssignToReg<[ST0]>>,
49 CCIfType<[f64], CCAssignToReg<[ST0]>>,
50 CCDelegateTo<RetCC_X86Common>
53 // X86-32 FastCC return-value convention.
54 def RetCC_X86_32_Fast : CallingConv<[
55 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
56 // SSE2, otherwise it is the the C calling conventions.
57 // This can happen when a float, 2 x float, or 3 x float vector is split by
58 // target lowering, and is returned in 1-3 sse regs.
59 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
60 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
61 CCDelegateTo<RetCC_X86Common>
64 // X86-32 SSEregparm return-value convention.
65 def RetCC_X86_32_SSE : CallingConv<[
66 // The X86-32 sseregparm calling convention returns FP values in XMM0 if the
67 // target has SSE2, otherwise it is the C calling convention.
68 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
69 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
70 CCDelegateTo<RetCC_X86Common>
73 // X86-64 C return-value convention.
74 def RetCC_X86_64_C : CallingConv<[
75 // The X86-64 calling convention always returns FP values in XMM0.
76 CCIfType<[f32], CCAssignToReg<[XMM0]>>,
77 CCIfType<[f64], CCAssignToReg<[XMM0]>>,
78 CCDelegateTo<RetCC_X86Common>
81 // This is the root return-value convention for the X86-32 backend.
82 def RetCC_X86_32 : CallingConv<[
83 // If FastCC, use RetCC_X86_32_Fast.
84 CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
85 // If SSECC, use RetCC_X86_32_SSE.
86 CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
87 // Otherwise, use RetCC_X86_32_C.
88 CCDelegateTo<RetCC_X86_32_C>
91 // This is the root return-value convention for the X86-64 backend.
92 def RetCC_X86_64 : CallingConv<[
93 // Always just the same as C calling conv for X86-64.
94 CCDelegateTo<RetCC_X86_64_C>
97 // This is the return-value convention used for the entire X86 backend.
98 def RetCC_X86 : CallingConv<[
99 CCIfSubtarget<"is64Bit()", CCDelegateTo<RetCC_X86_64>>,
100 CCDelegateTo<RetCC_X86_32>
103 //===----------------------------------------------------------------------===//
104 // X86-64 Argument Calling Conventions
105 //===----------------------------------------------------------------------===//
107 def CC_X86_64_C : CallingConv<[
108 // Handles byval parameters.
109 CCIfByVal<CCPassByVal<8, 8>>,
111 // Promote i8/i16 arguments to i32.
112 CCIfType<[i8, i16], CCPromoteToType<i32>>,
114 // The 'nest' parameter, if any, is passed in R10.
115 CCIfNest<CCAssignToReg<[R10]>>,
117 // The first 6 integer arguments are passed in integer registers.
118 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
119 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
121 // The first 8 FP/Vector arguments are passed in XMM registers.
122 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
123 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
125 // The first 8 MMX vector arguments are passed in GPRs.
126 CCIfType<[v8i8, v4i16, v2i32, v1i64],
127 CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
129 // Integer/FP values get stored in stack slots that are 8 bytes in size and
130 // 8-byte aligned if there are no more registers to hold them.
131 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
133 // Long doubles get stack slots whose size and alignment depends on the
135 CCIfType<[f80], CCAssignToStack<0, 0>>,
137 // Vectors get 16-byte stack slots that are 16-byte aligned.
138 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
140 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
141 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
144 // Tail call convention (fast): One register is reserved for target address,
146 def CC_X86_64_TailCall : CallingConv<[
147 // Handles byval parameters.
148 CCIfByVal<CCPassByVal<8, 8>>,
150 // Promote i8/i16 arguments to i32.
151 CCIfType<[i8, i16], CCPromoteToType<i32>>,
153 // The 'nest' parameter, if any, is passed in R10.
154 CCIfNest<CCAssignToReg<[R10]>>,
156 // The first 6 integer arguments are passed in integer registers.
157 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D]>>,
158 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
160 // The first 8 FP/Vector arguments are passed in XMM registers.
161 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
162 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
164 // The first 8 MMX vector arguments are passed in GPRs.
165 CCIfType<[v8i8, v4i16, v2i32, v1i64],
166 CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
168 // Integer/FP values get stored in stack slots that are 8 bytes in size and
169 // 8-byte aligned if there are no more registers to hold them.
170 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
172 // Vectors get 16-byte stack slots that are 16-byte aligned.
173 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
175 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
176 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
180 //===----------------------------------------------------------------------===//
181 // X86 C Calling Convention
182 //===----------------------------------------------------------------------===//
184 /// CC_X86_32_Common - In all X86-32 calling conventions, extra integers and FP
185 /// values are spilled on the stack, and the first 4 vector values go in XMM
187 def CC_X86_32_Common : CallingConv<[
188 // Handles byval parameters.
189 CCIfByVal<CCPassByVal<4, 4>>,
191 // The first 3 float or double arguments, if marked 'inreg' and if the call
192 // is not a vararg call and if SSE2 is available, are passed in SSE registers.
193 CCIfNotVarArg<CCIfInReg<CCIfType<[f32,f64], CCIfSubtarget<"hasSSE2()",
194 CCAssignToReg<[XMM0,XMM1,XMM2]>>>>>,
196 // Integer/Float values get stored in stack slots that are 4 bytes in
197 // size and 4-byte aligned.
198 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
200 // Doubles get 8-byte slots that are 4-byte aligned.
201 CCIfType<[f64], CCAssignToStack<8, 4>>,
203 // Long doubles get slots whose size depends on the subtarget.
204 CCIfType<[f80], CCAssignToStack<0, 4>>,
206 // The first 4 vector arguments are passed in XMM registers.
207 CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
208 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>>,
210 // Other vectors get 16-byte stack slots that are 16-byte aligned.
211 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
213 // __m64 vectors get 8-byte stack slots that are 8-byte aligned. They are
214 // passed in the parameter area.
215 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
218 def CC_X86_32_C : CallingConv<[
219 // Promote i8/i16 arguments to i32.
220 CCIfType<[i8, i16], CCPromoteToType<i32>>,
222 // The 'nest' parameter, if any, is passed in ECX.
223 CCIfNest<CCAssignToReg<[ECX]>>,
225 // The first 3 integer arguments, if marked 'inreg' and if the call is not
226 // a vararg call, are passed in integer registers.
227 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
229 // Otherwise, same as everything else.
230 CCDelegateTo<CC_X86_32_Common>
233 /// Same as C calling convention except for non-free ECX which is used for storing
234 /// a potential pointer to the tail called function.
235 def CC_X86_32_TailCall : CallingConv<[
236 // Promote i8/i16 arguments to i32.
237 CCIfType<[i8, i16], CCPromoteToType<i32>>,
239 // Nested function trampolines are currently not supported by fastcc.
241 // The first 3 integer arguments, if marked 'inreg' and if the call is not
242 // a vararg call, are passed in integer registers.
243 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,
245 // Otherwise, same as everything else.
246 CCDelegateTo<CC_X86_32_Common>
249 def CC_X86_32_FastCall : CallingConv<[
250 // Promote i8/i16 arguments to i32.
251 CCIfType<[i8, i16], CCPromoteToType<i32>>,
253 // The 'nest' parameter, if any, is passed in EAX.
254 CCIfNest<CCAssignToReg<[EAX]>>,
256 // The first 2 integer arguments are passed in ECX/EDX
257 CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
259 // Otherwise, same as everything else.
260 CCDelegateTo<CC_X86_32_Common>