1 //===-- X86/MachineCodeEmitter.cpp - Convert X86 code to machine code -----===//
3 // This file contains the pass that transforms the X86 machine instructions into
4 // actual executable machine code.
6 //===----------------------------------------------------------------------===//
8 #include "X86TargetMachine.h"
10 #include "llvm/PassManager.h"
11 #include "llvm/CodeGen/MachineCodeEmitter.h"
12 #include "llvm/CodeGen/MachineFunction.h"
13 #include "llvm/CodeGen/MachineInstr.h"
14 #include "llvm/Value.h"
17 class Emitter : public FunctionPass {
19 const X86InstrInfo ⅈ
20 MachineCodeEmitter &MCE;
23 Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
24 : TM(tm), II(TM.getInstrInfo()), MCE(mce) {}
26 bool runOnFunction(Function &F);
29 void emitBasicBlock(MachineBasicBlock &MBB);
30 void emitInstruction(MachineInstr &MI);
32 void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
33 void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
34 void emitConstant(unsigned Val, unsigned Size);
36 void emitMemModRMByte(const MachineInstr &MI,
37 unsigned Op, unsigned RegOpcodeField);
43 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
44 /// machine code emitted. This uses a MAchineCodeEmitter object to handle
45 /// actually outputting the machine code and resolving things like the address
46 /// of functions. This method should returns true if machine code emission is
49 bool X86TargetMachine::addPassesToEmitMachineCode(PassManager &PM,
50 MachineCodeEmitter &MCE) {
51 PM.add(new Emitter(*this, MCE));
55 bool Emitter::runOnFunction(Function &F) {
56 MachineFunction &MF = MachineFunction::get(&F);
58 MCE.startFunction(MF);
59 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
61 MCE.finishFunction(MF);
65 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
66 MCE.startBasicBlock(MBB);
67 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
72 namespace N86 { // Native X86 Register numbers...
74 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
79 // getX86RegNum - This function maps LLVM register identifiers to their X86
80 // specific numbering, which is used in various places encoding instructions.
82 static unsigned getX86RegNum(unsigned RegNo) {
84 case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
85 case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
86 case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
87 case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
88 case X86::ESP: case X86::SP: case X86::AH: return N86::ESP;
89 case X86::EBP: case X86::BP: case X86::CH: return N86::EBP;
90 case X86::ESI: case X86::SI: case X86::DH: return N86::ESI;
91 case X86::EDI: case X86::DI: case X86::BH: return N86::EDI;
93 assert(RegNo >= MRegisterInfo::FirstVirtualRegister &&
94 "Unknown physical register!");
95 assert(0 && "Register allocator hasn't allocated reg correctly yet!");
100 inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
102 assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
103 return RM | (RegOpcode << 3) | (Mod << 6);
106 void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
107 MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
110 void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
111 // SIB byte is in the same format as the ModRMByte...
112 MCE.emitByte(ModRMByte(SS, Index, Base));
115 void Emitter::emitConstant(unsigned Val, unsigned Size) {
116 // Output the constant in little endian byte order...
117 for (unsigned i = 0; i != Size; ++i) {
118 MCE.emitByte(Val & 255);
123 static bool isDisp8(int Value) {
124 return Value == (signed char)Value;
127 void Emitter::emitMemModRMByte(const MachineInstr &MI,
128 unsigned Op, unsigned RegOpcodeField) {
129 const MachineOperand &BaseReg = MI.getOperand(Op);
130 const MachineOperand &Scale = MI.getOperand(Op+1);
131 const MachineOperand &IndexReg = MI.getOperand(Op+2);
132 const MachineOperand &Disp = MI.getOperand(Op+3);
134 // Is a SIB byte needed?
135 if (IndexReg.getReg() == 0 && BaseReg.getReg() != X86::ESP) {
136 if (BaseReg.getReg() == 0) { // Just a displacement?
137 // Emit special case [disp32] encoding
138 MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
139 emitConstant(Disp.getImmedValue(), 4);
141 unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
142 if (Disp.getImmedValue() == 0 && BaseRegNo != N86::EBP) {
143 // Emit simple indirect register encoding... [EAX] f.e.
144 MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
145 } else if (isDisp8(Disp.getImmedValue())) {
146 // Emit the disp8 encoding... [REG+disp8]
147 MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
148 emitConstant(Disp.getImmedValue(), 1);
150 // Emit the most general non-SIB encoding: [REG+disp32]
151 MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
152 emitConstant(Disp.getImmedValue(), 4);
156 } else { // We need a SIB byte, so start by outputting the ModR/M byte first
157 assert(IndexReg.getReg() != X86::ESP && "Cannot use ESP as index reg!");
159 bool ForceDisp32 = false;
160 if (BaseReg.getReg() == 0) {
161 // If there is no base register, we emit the special case SIB byte with
162 // MOD=0, BASE=5, to JUST get the index, scale, and displacement.
163 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
165 } else if (Disp.getImmedValue() == 0) {
166 // Emit no displacement ModR/M byte
167 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
168 } else if (isDisp8(Disp.getImmedValue())) {
169 // Emit the disp8 encoding...
170 MCE.emitByte(ModRMByte(1, RegOpcodeField, 4));
172 // Emit the normal disp32 encoding...
173 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
176 // Calculate what the SS field value should be...
177 static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 };
178 unsigned SS = SSTable[Scale.getImmedValue()];
180 if (BaseReg.getReg() == 0) {
181 // Handle the SIB byte for the case where there is no base. The
182 // displacement has already been output.
183 assert(IndexReg.getReg() && "Index register must be specified!");
184 emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
186 unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
187 unsigned IndexRegNo = getX86RegNum(IndexReg.getReg());
188 emitSIBByte(SS, IndexRegNo, BaseRegNo);
191 // Do we need to output a displacement?
192 if (Disp.getImmedValue() != 0 || ForceDisp32) {
193 if (!ForceDisp32 && isDisp8(Disp.getImmedValue()))
194 emitConstant(Disp.getImmedValue(), 1);
196 emitConstant(Disp.getImmedValue(), 4);
201 static bool isImmediate(const MachineOperand &MO) {
202 return MO.getType() == MachineOperand::MO_SignExtendedImmed ||
203 MO.getType() == MachineOperand::MO_UnextendedImmed;
206 unsigned sizeOfPtr (const MachineInstrDescriptor &Desc) {
207 switch (Desc.TSFlags & X86II::ArgMask) {
208 case X86II::Arg8: return 1;
209 case X86II::Arg16: return 2;
210 case X86II::Arg32: return 4;
211 case X86II::Arg64: return 8;
212 case X86II::Arg80: return 10;
213 case X86II::Arg128: return 16;
214 default: assert(0 && "Memory size not set!");
219 void Emitter::emitInstruction(MachineInstr &MI) {
220 unsigned Opcode = MI.getOpcode();
221 const MachineInstrDescriptor &Desc = II.get(Opcode);
223 // Emit instruction prefixes if neccesary
224 if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
225 if (Desc.TSFlags & X86II::TB) MCE.emitByte(0x0F);// Two-byte opcode prefix
227 unsigned char BaseOpcode = II.getBaseOpcodeFor(Opcode);
228 switch (Desc.TSFlags & X86II::FormMask) {
230 MCE.emitByte(BaseOpcode);
232 if (MI.getNumOperands() == 1) {
233 assert(MI.getOperand(0).getType() == MachineOperand::MO_PCRelativeDisp);
234 MCE.emitPCRelativeDisp(MI.getOperand(0).getVRegValue());
237 case X86II::AddRegFrm:
238 MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
239 if (MI.getNumOperands() == 2) {
240 unsigned Size = sizeOfPtr(Desc);
241 if (Value *V = MI.getOperand(1).getVRegValueOrNull()) {
242 assert(Size == 4 && "Don't know how to emit non-pointer values!");
243 MCE.emitGlobalAddress(cast<GlobalValue>(V));
245 emitConstant(MI.getOperand(1).getImmedValue(), Size);
249 case X86II::MRMDestReg:
250 MCE.emitByte(BaseOpcode);
251 emitRegModRMByte(MI.getOperand(0).getReg(),
252 getX86RegNum(MI.getOperand(MI.getNumOperands()-1).getReg()));
254 case X86II::MRMDestMem:
255 MCE.emitByte(BaseOpcode);
256 emitMemModRMByte(MI, 0, getX86RegNum(MI.getOperand(4).getReg()));
258 case X86II::MRMSrcReg:
259 MCE.emitByte(BaseOpcode);
260 emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(),
261 getX86RegNum(MI.getOperand(0).getReg()));
263 case X86II::MRMSrcMem:
264 MCE.emitByte(BaseOpcode);
265 emitMemModRMByte(MI, MI.getNumOperands()-4,
266 getX86RegNum(MI.getOperand(0).getReg()));
269 case X86II::MRMS0r: case X86II::MRMS1r:
270 case X86II::MRMS2r: case X86II::MRMS3r:
271 case X86II::MRMS4r: case X86II::MRMS5r:
272 case X86II::MRMS6r: case X86II::MRMS7r:
273 MCE.emitByte(BaseOpcode);
274 emitRegModRMByte(MI.getOperand(0).getReg(),
275 (Desc.TSFlags & X86II::FormMask)-X86II::MRMS0r);
277 if (isImmediate(MI.getOperand(MI.getNumOperands()-1))) {
278 unsigned Size = sizeOfPtr(Desc);
279 emitConstant(MI.getOperand(MI.getNumOperands()-1).getImmedValue(), Size);