1 //===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the pass that transforms the X86 machine instructions into
11 // relocatable machine code.
13 //===----------------------------------------------------------------------===//
15 #include "X86TargetMachine.h"
16 #include "X86Relocations.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineCodeEmitter.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Function.h"
24 #include "llvm/ADT/Statistic.h"
25 #include "llvm/Target/TargetOptions.h"
31 NumEmitted("x86-emitter", "Number of machine instructions emitted");
35 class Emitter : public MachineFunctionPass {
36 const X86InstrInfo *II;
37 MachineCodeEmitter &MCE;
38 std::map<MachineBasicBlock*, uint64_t> BasicBlockAddrs;
39 std::vector<std::pair<MachineBasicBlock *, unsigned> > BBRefs;
41 explicit Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
42 Emitter(MachineCodeEmitter &mce, const X86InstrInfo& ii)
43 : II(&ii), MCE(mce) {}
45 bool runOnMachineFunction(MachineFunction &MF);
47 virtual const char *getPassName() const {
48 return "X86 Machine Code Emitter";
51 void emitInstruction(const MachineInstr &MI);
54 void emitBasicBlock(MachineBasicBlock &MBB);
55 void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
56 void emitPCRelativeValue(unsigned Address);
57 void emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall);
58 void emitGlobalAddressForPtr(GlobalValue *GV, int Disp = 0);
59 void emitExternalSymbolAddress(const char *ES, bool isPCRelative,
62 void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
63 void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
64 void emitConstant(unsigned Val, unsigned Size);
66 void emitMemModRMByte(const MachineInstr &MI,
67 unsigned Op, unsigned RegOpcodeField);
72 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
73 /// to the specified MCE object.
74 FunctionPass *llvm::createX86CodeEmitterPass(MachineCodeEmitter &MCE) {
75 return new Emitter(MCE);
78 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
79 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
80 MF.getTarget().getRelocationModel() != Reloc::Static) &&
81 "JIT relocation model must be set to static or default!");
82 II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo();
84 MCE.startFunction(MF);
85 MCE.emitConstantPool(MF.getConstantPool());
86 MCE.initJumpTableInfo(MF.getJumpTableInfo());
87 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
89 MCE.emitJumpTableInfo(MF.getJumpTableInfo(), BasicBlockAddrs);
90 MCE.finishFunction(MF);
92 // Resolve all forward branches now...
93 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
94 unsigned Location = BasicBlockAddrs[BBRefs[i].first];
95 unsigned Ref = BBRefs[i].second;
96 MCE.emitWordAt(Location-Ref-4, (unsigned*)(intptr_t)Ref);
99 BasicBlockAddrs.clear();
103 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
104 if (uint64_t Addr = MCE.getCurrentPCValue())
105 BasicBlockAddrs[&MBB] = Addr;
107 for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
112 /// emitPCRelativeValue - Emit a 32-bit PC relative address.
114 void Emitter::emitPCRelativeValue(unsigned Address) {
115 MCE.emitWord(Address-MCE.getCurrentPCValue()-4);
118 /// emitPCRelativeBlockAddress - This method emits the PC relative address of
119 /// the specified basic block, or if the basic block hasn't been emitted yet
120 /// (because this is a forward branch), it keeps track of the information
121 /// necessary to resolve this address later (and emits a dummy value).
123 void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
124 // If this is a backwards branch, we already know the address of the target,
125 // so just emit the value.
126 std::map<MachineBasicBlock*,uint64_t>::iterator I = BasicBlockAddrs.find(MBB);
127 if (I != BasicBlockAddrs.end()) {
128 emitPCRelativeValue(I->second);
130 // Otherwise, remember where this reference was and where it is to so we can
131 // deal with it later.
132 BBRefs.push_back(std::make_pair(MBB, MCE.getCurrentPCValue()));
137 /// emitGlobalAddressForCall - Emit the specified address to the code stream
138 /// assuming this is part of a function call, which is PC relative.
140 void Emitter::emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall) {
141 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
142 X86::reloc_pcrel_word, GV, 0,
143 !isTailCall /*Doesn'tNeedStub*/));
147 /// emitGlobalAddress - Emit the specified address to the code stream assuming
148 /// this is part of a "take the address of a global" instruction, which is not
151 void Emitter::emitGlobalAddressForPtr(GlobalValue *GV, int Disp /* = 0 */) {
152 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
153 X86::reloc_absolute_word, GV));
154 MCE.emitWord(Disp); // The relocated value will be added to the displacement
157 /// emitExternalSymbolAddress - Arrange for the address of an external symbol to
158 /// be emitted to the current location in the function, and allow it to be PC
160 void Emitter::emitExternalSymbolAddress(const char *ES, bool isPCRelative,
162 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
163 isPCRelative ? X86::reloc_pcrel_word : X86::reloc_absolute_word, ES));
167 /// N86 namespace - Native X86 Register numbers... used by X86 backend.
171 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
176 // getX86RegNum - This function maps LLVM register identifiers to their X86
177 // specific numbering, which is used in various places encoding instructions.
179 static unsigned getX86RegNum(unsigned RegNo) {
181 case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
182 case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
183 case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
184 case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
185 case X86::ESP: case X86::SP: case X86::AH: return N86::ESP;
186 case X86::EBP: case X86::BP: case X86::CH: return N86::EBP;
187 case X86::ESI: case X86::SI: case X86::DH: return N86::ESI;
188 case X86::EDI: case X86::DI: case X86::BH: return N86::EDI;
190 case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3:
191 case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
192 return RegNo-X86::ST0;
194 case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3:
195 case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7:
196 return RegNo-X86::XMM0;
199 assert(MRegisterInfo::isVirtualRegister(RegNo) &&
200 "Unknown physical register!");
201 assert(0 && "Register allocator hasn't allocated reg correctly yet!");
206 inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
208 assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
209 return RM | (RegOpcode << 3) | (Mod << 6);
212 void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
213 MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
216 void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
217 // SIB byte is in the same format as the ModRMByte...
218 MCE.emitByte(ModRMByte(SS, Index, Base));
221 void Emitter::emitConstant(unsigned Val, unsigned Size) {
222 // Output the constant in little endian byte order...
223 for (unsigned i = 0; i != Size; ++i) {
224 MCE.emitByte(Val & 255);
229 static bool isDisp8(int Value) {
230 return Value == (signed char)Value;
233 void Emitter::emitMemModRMByte(const MachineInstr &MI,
234 unsigned Op, unsigned RegOpcodeField) {
235 const MachineOperand &Op3 = MI.getOperand(Op+3);
239 if (Op3.isGlobalAddress()) {
240 GV = Op3.getGlobal();
241 DispVal = Op3.getOffset();
242 } else if (Op3.isConstantPoolIndex()) {
243 DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
244 DispVal += Op3.getOffset();
245 } else if (Op3.isJumpTableIndex()) {
246 DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex());
248 DispVal = Op3.getImmedValue();
251 const MachineOperand &Base = MI.getOperand(Op);
252 const MachineOperand &Scale = MI.getOperand(Op+1);
253 const MachineOperand &IndexReg = MI.getOperand(Op+2);
255 unsigned BaseReg = Base.getReg();
257 // Is a SIB byte needed?
258 if (IndexReg.getReg() == 0 && BaseReg != X86::ESP) {
259 if (BaseReg == 0) { // Just a displacement?
260 // Emit special case [disp32] encoding
261 MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
263 emitGlobalAddressForPtr(GV, DispVal);
265 emitConstant(DispVal, 4);
267 unsigned BaseRegNo = getX86RegNum(BaseReg);
269 // Emit the most general non-SIB encoding: [REG+disp32]
270 MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
271 emitGlobalAddressForPtr(GV, DispVal);
272 } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
273 // Emit simple indirect register encoding... [EAX] f.e.
274 MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
275 } else if (isDisp8(DispVal)) {
276 // Emit the disp8 encoding... [REG+disp8]
277 MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
278 emitConstant(DispVal, 1);
280 // Emit the most general non-SIB encoding: [REG+disp32]
281 MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
282 emitConstant(DispVal, 4);
286 } else { // We need a SIB byte, so start by outputting the ModR/M byte first
287 assert(IndexReg.getReg() != X86::ESP && "Cannot use ESP as index reg!");
289 bool ForceDisp32 = false;
290 bool ForceDisp8 = false;
292 // If there is no base register, we emit the special case SIB byte with
293 // MOD=0, BASE=5, to JUST get the index, scale, and displacement.
294 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
297 // Emit the normal disp32 encoding...
298 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
300 } else if (DispVal == 0 && BaseReg != X86::EBP) {
301 // Emit no displacement ModR/M byte
302 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
303 } else if (isDisp8(DispVal)) {
304 // Emit the disp8 encoding...
305 MCE.emitByte(ModRMByte(1, RegOpcodeField, 4));
306 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
308 // Emit the normal disp32 encoding...
309 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
312 // Calculate what the SS field value should be...
313 static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 };
314 unsigned SS = SSTable[Scale.getImmedValue()];
317 // Handle the SIB byte for the case where there is no base. The
318 // displacement has already been output.
319 assert(IndexReg.getReg() && "Index register must be specified!");
320 emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
322 unsigned BaseRegNo = getX86RegNum(BaseReg);
324 if (IndexReg.getReg())
325 IndexRegNo = getX86RegNum(IndexReg.getReg());
327 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
328 emitSIBByte(SS, IndexRegNo, BaseRegNo);
331 // Do we need to output a displacement?
332 if (DispVal != 0 || ForceDisp32 || ForceDisp8) {
333 if (!ForceDisp32 && isDisp8(DispVal))
334 emitConstant(DispVal, 1);
336 emitGlobalAddressForPtr(GV, DispVal);
338 emitConstant(DispVal, 4);
343 static unsigned sizeOfImm(const TargetInstrDescriptor &Desc) {
344 switch (Desc.TSFlags & X86II::ImmMask) {
345 case X86II::Imm8: return 1;
346 case X86II::Imm16: return 2;
347 case X86II::Imm32: return 4;
348 default: assert(0 && "Immediate size not set!");
353 void Emitter::emitInstruction(const MachineInstr &MI) {
354 NumEmitted++; // Keep track of the # of mi's emitted
356 unsigned Opcode = MI.getOpcode();
357 const TargetInstrDescriptor &Desc = II->get(Opcode);
359 // Emit the repeat opcode prefix as needed.
360 if ((Desc.TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3);
362 // Emit the operand size opcode prefix as needed.
363 if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);
365 switch (Desc.TSFlags & X86II::Op0Mask) {
367 MCE.emitByte(0x0F); // Two-byte opcode prefix
369 case X86II::REP: break; // already handled.
370 case X86II::XS: // F3 0F
374 case X86II::XD: // F2 0F
378 case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
379 case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
381 (((Desc.TSFlags & X86II::Op0Mask)-X86II::D8)
382 >> X86II::Op0Shift));
383 break; // Two-byte opcode prefix
384 default: assert(0 && "Invalid prefix!");
385 case 0: break; // No prefix!
388 unsigned char BaseOpcode = II->getBaseOpcodeFor(Opcode);
389 switch (Desc.TSFlags & X86II::FormMask) {
390 default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
395 assert(0 && "psuedo instructions should be removed before code emission");
396 case X86::IMPLICIT_USE:
397 case X86::IMPLICIT_DEF:
398 case X86::IMPLICIT_DEF_R8:
399 case X86::IMPLICIT_DEF_R16:
400 case X86::IMPLICIT_DEF_R32:
401 case X86::IMPLICIT_DEF_FR32:
402 case X86::IMPLICIT_DEF_FR64:
403 case X86::IMPLICIT_DEF_VR64:
404 case X86::IMPLICIT_DEF_VR128:
405 case X86::FP_REG_KILL:
412 MCE.emitByte(BaseOpcode);
413 if (MI.getNumOperands() == 1) {
414 const MachineOperand &MO = MI.getOperand(0);
415 if (MO.isMachineBasicBlock()) {
416 emitPCRelativeBlockAddress(MO.getMachineBasicBlock());
417 } else if (MO.isGlobalAddress()) {
418 bool isTailCall = Opcode == X86::TAILJMPd ||
419 Opcode == X86::TAILJMPr || Opcode == X86::TAILJMPm;
420 emitGlobalAddressForCall(MO.getGlobal(), isTailCall);
421 } else if (MO.isExternalSymbol()) {
422 bool isTailCall = Opcode == X86::TAILJMPd ||
423 Opcode == X86::TAILJMPr || Opcode == X86::TAILJMPm;
424 emitExternalSymbolAddress(MO.getSymbolName(), true, isTailCall);
425 } else if (MO.isImmediate()) {
426 emitConstant(MO.getImmedValue(), sizeOfImm(Desc));
428 assert(0 && "Unknown RawFrm operand!");
433 case X86II::AddRegFrm:
434 MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
435 if (MI.getNumOperands() == 2) {
436 const MachineOperand &MO1 = MI.getOperand(1);
437 if (Value *V = MO1.getVRegValueOrNull()) {
438 assert(sizeOfImm(Desc) == 4 &&
439 "Don't know how to emit non-pointer values!");
440 emitGlobalAddressForPtr(cast<GlobalValue>(V));
441 } else if (MO1.isGlobalAddress()) {
442 assert(sizeOfImm(Desc) == 4 &&
443 "Don't know how to emit non-pointer values!");
444 assert(!MO1.isPCRelative() && "Function pointer ref is PC relative?");
445 emitGlobalAddressForPtr(MO1.getGlobal(), MO1.getOffset());
446 } else if (MO1.isExternalSymbol()) {
447 assert(sizeOfImm(Desc) == 4 &&
448 "Don't know how to emit non-pointer values!");
449 emitExternalSymbolAddress(MO1.getSymbolName(), false, false);
450 } else if (MO1.isJumpTableIndex()) {
451 assert(sizeOfImm(Desc) == 4 &&
452 "Don't know how to emit non-pointer values!");
453 emitConstant(MCE.getJumpTableEntryAddress(MO1.getJumpTableIndex()), 4);
455 emitConstant(MO1.getImmedValue(), sizeOfImm(Desc));
460 case X86II::MRMDestReg: {
461 MCE.emitByte(BaseOpcode);
462 emitRegModRMByte(MI.getOperand(0).getReg(),
463 getX86RegNum(MI.getOperand(1).getReg()));
464 if (MI.getNumOperands() == 3)
465 emitConstant(MI.getOperand(2).getImmedValue(), sizeOfImm(Desc));
468 case X86II::MRMDestMem:
469 MCE.emitByte(BaseOpcode);
470 emitMemModRMByte(MI, 0, getX86RegNum(MI.getOperand(4).getReg()));
471 if (MI.getNumOperands() == 6)
472 emitConstant(MI.getOperand(5).getImmedValue(), sizeOfImm(Desc));
475 case X86II::MRMSrcReg:
476 MCE.emitByte(BaseOpcode);
477 emitRegModRMByte(MI.getOperand(1).getReg(),
478 getX86RegNum(MI.getOperand(0).getReg()));
479 if (MI.getNumOperands() == 3)
480 emitConstant(MI.getOperand(2).getImmedValue(), sizeOfImm(Desc));
483 case X86II::MRMSrcMem:
484 MCE.emitByte(BaseOpcode);
485 emitMemModRMByte(MI, 1, getX86RegNum(MI.getOperand(0).getReg()));
486 if (MI.getNumOperands() == 2+4)
487 emitConstant(MI.getOperand(5).getImmedValue(), sizeOfImm(Desc));
490 case X86II::MRM0r: case X86II::MRM1r:
491 case X86II::MRM2r: case X86II::MRM3r:
492 case X86II::MRM4r: case X86II::MRM5r:
493 case X86II::MRM6r: case X86II::MRM7r:
494 MCE.emitByte(BaseOpcode);
495 emitRegModRMByte(MI.getOperand(0).getReg(),
496 (Desc.TSFlags & X86II::FormMask)-X86II::MRM0r);
498 if (MI.getOperand(MI.getNumOperands()-1).isImmediate()) {
499 emitConstant(MI.getOperand(MI.getNumOperands()-1).getImmedValue(),
504 case X86II::MRM0m: case X86II::MRM1m:
505 case X86II::MRM2m: case X86II::MRM3m:
506 case X86II::MRM4m: case X86II::MRM5m:
507 case X86II::MRM6m: case X86II::MRM7m:
508 MCE.emitByte(BaseOpcode);
509 emitMemModRMByte(MI, 0, (Desc.TSFlags & X86II::FormMask)-X86II::MRM0m);
511 if (MI.getNumOperands() == 5) {
512 if (MI.getOperand(4).isImmediate())
513 emitConstant(MI.getOperand(4).getImmedValue(), sizeOfImm(Desc));
514 else if (MI.getOperand(4).isGlobalAddress())
515 emitGlobalAddressForPtr(MI.getOperand(4).getGlobal(),
516 MI.getOperand(4).getOffset());
518 assert(0 && "Unknown operand!");
522 case X86II::MRMInitReg:
523 MCE.emitByte(BaseOpcode);
524 emitRegModRMByte(MI.getOperand(0).getReg(),
525 getX86RegNum(MI.getOperand(0).getReg()));