1 //===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the pass that transforms the X86 machine instructions into
11 // actual executable machine code.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "jit"
16 #include "X86TargetMachine.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineCodeEmitter.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Function.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/ADT/Statistic.h"
26 #include "llvm/Config/alloca.h"
31 NumEmitted("x86-emitter", "Number of machine instructions emitted");
34 MachineCodeEmitter &MCE;
36 // LazyCodeGenMap - Keep track of call sites for functions that are to be
38 std::map<unsigned, Function*> LazyCodeGenMap;
40 // LazyResolverMap - Keep track of the lazy resolver created for a
41 // particular function so that we can reuse them if necessary.
42 std::map<Function*, unsigned> LazyResolverMap;
44 JITResolver(MachineCodeEmitter &mce) : MCE(mce) {}
45 unsigned getLazyResolver(Function *F);
46 unsigned addFunctionReference(unsigned Address, Function *F);
49 unsigned emitStubForFunction(Function *F);
50 static void CompilationCallback();
51 unsigned resolveFunctionReference(unsigned RetAddr);
54 static JITResolver &getResolver(MachineCodeEmitter &MCE) {
55 static JITResolver *TheJITResolver = 0;
56 if (TheJITResolver == 0)
57 TheJITResolver = new JITResolver(MCE);
58 return *TheJITResolver;
63 void *X86JITInfo::getJITStubForFunction(Function *F, MachineCodeEmitter &MCE) {
64 return (void*)(intptr_t)getResolver(MCE).getLazyResolver(F);
67 void X86JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
68 unsigned char *OldByte = (unsigned char *) Old;
69 *OldByte++ = 0xE9; // Emit JMP opcode.
70 int32_t *OldWord = (int32_t *) OldByte;
71 int32_t NewAddr = (intptr_t) New;
72 int32_t OldAddr = (intptr_t) OldWord;
73 *OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code.
76 /// addFunctionReference - This method is called when we need to emit the
77 /// address of a function that has not yet been emitted, so we don't know the
78 /// address. Instead, we emit a call to the CompilationCallback method, and
79 /// keep track of where we are.
81 unsigned JITResolver::addFunctionReference(unsigned Address, Function *F) {
82 DEBUG(std::cerr << "Emitting lazily resolved reference to function '"
83 << F->getName() << "' at address " << std::hex << Address << "\n");
84 LazyCodeGenMap[Address] = F;
85 return (intptr_t)&JITResolver::CompilationCallback;
88 unsigned JITResolver::resolveFunctionReference(unsigned RetAddr) {
89 std::map<unsigned, Function*>::iterator I = LazyCodeGenMap.find(RetAddr);
90 assert(I != LazyCodeGenMap.end() && "Not in map!");
91 Function *F = I->second;
92 LazyCodeGenMap.erase(I);
93 return MCE.forceCompilationOf(F);
96 unsigned JITResolver::getLazyResolver(Function *F) {
97 std::map<Function*, unsigned>::iterator I = LazyResolverMap.lower_bound(F);
98 if (I != LazyResolverMap.end() && I->first == F) return I->second;
100 //std::cerr << "Getting lazy resolver for : " << ((Value*)F)->getName() << "\n";
102 unsigned Stub = emitStubForFunction(F);
103 LazyResolverMap.insert(I, std::make_pair(F, Stub));
108 #pragma optimize("y", off)
111 void JITResolver::CompilationCallback() {
113 unsigned *StackPtr, RetAddr;
114 __asm mov StackPtr, ebp;
115 __asm mov eax, DWORD PTR [ebp + 4];
116 __asm mov RetAddr, eax;
118 unsigned *StackPtr = (unsigned*)__builtin_frame_address(0);
119 unsigned RetAddr = (unsigned)(intptr_t)__builtin_return_address(0);
121 // FIXME: __builtin_frame_address doesn't work if frame pointer elimination
122 // has been performed. Having a variable sized alloca disables frame pointer
123 // elimination currently, even if it's dead. This is a gross hack.
124 alloca(10+(RetAddr >> 31));
127 assert(StackPtr[1] == RetAddr &&
128 "Could not find return address on the stack!");
130 // It's a stub if there is an interrupt marker after the call...
131 bool isStub = ((unsigned char*)(intptr_t)RetAddr)[0] == 0xCD;
133 // The call instruction should have pushed the return value onto the stack...
134 RetAddr -= 4; // Backtrack to the reference itself...
137 DEBUG(std::cerr << "In callback! Addr=0x" << std::hex << RetAddr
138 << " ESP=0x" << (unsigned)StackPtr << std::dec
139 << ": Resolving call to function: "
140 << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n");
143 // Sanity check to make sure this really is a call instruction...
144 assert(((unsigned char*)(intptr_t)RetAddr)[-1] == 0xE8 &&"Not a call instr!");
146 JITResolver &JR = getResolver(*(MachineCodeEmitter*)0);
147 unsigned NewVal = JR.resolveFunctionReference(RetAddr);
149 // Rewrite the call target... so that we don't fault every time we execute
151 *(unsigned*)(intptr_t)RetAddr = NewVal-RetAddr-4;
154 // If this is a stub, rewrite the call into an unconditional branch
155 // instruction so that two return addresses are not pushed onto the stack
156 // when the requested function finally gets called. This also makes the
157 // 0xCD byte (interrupt) dead, so the marker doesn't effect anything.
158 ((unsigned char*)(intptr_t)RetAddr)[-1] = 0xE9;
161 // Change the return address to reexecute the call instruction...
166 #pragma optimize( "", on )
169 /// emitStubForFunction - This method is used by the JIT when it needs to emit
170 /// the address of a function for a function whose code has not yet been
171 /// generated. In order to do this, it generates a stub which jumps to the lazy
172 /// function compiler, which will eventually get fixed to call the function
175 unsigned JITResolver::emitStubForFunction(Function *F) {
176 MCE.startFunctionStub(*F, 6);
177 MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
179 unsigned Address = addFunctionReference(MCE.getCurrentPCValue(), F);
180 MCE.emitWord(Address-MCE.getCurrentPCValue()-4);
182 MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
183 return (intptr_t)MCE.finishFunctionStub(*F);
188 class Emitter : public MachineFunctionPass {
189 const X86InstrInfo *II;
190 MachineCodeEmitter &MCE;
191 std::map<const MachineBasicBlock*, unsigned> BasicBlockAddrs;
192 std::vector<std::pair<const MachineBasicBlock *, unsigned> > BBRefs;
194 explicit Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
195 Emitter(MachineCodeEmitter &mce, const X86InstrInfo& ii)
196 : II(&ii), MCE(mce) {}
198 bool runOnMachineFunction(MachineFunction &MF);
200 virtual const char *getPassName() const {
201 return "X86 Machine Code Emitter";
204 void emitInstruction(const MachineInstr &MI);
207 void emitBasicBlock(const MachineBasicBlock &MBB);
209 void emitPCRelativeBlockAddress(const MachineBasicBlock *BB);
210 void emitPCRelativeValue(unsigned Address);
211 void emitGlobalAddressForCall(GlobalValue *GV);
212 void emitGlobalAddressForPtr(GlobalValue *GV, int Disp = 0);
214 void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
215 void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
216 void emitConstant(unsigned Val, unsigned Size);
218 void emitMemModRMByte(const MachineInstr &MI,
219 unsigned Op, unsigned RegOpcodeField);
224 // This function is required by X86AsmPrinter.cpp to work around GAS bugs
225 void llvm::X86::emitInstruction(MachineCodeEmitter& mce,
226 const X86InstrInfo& ii,
227 const MachineInstr& mi)
229 Emitter(mce, ii).emitInstruction(mi);
232 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
233 /// machine code emitted. This uses a MachineCodeEmitter object to handle
234 /// actually outputting the machine code and resolving things like the address
235 /// of functions. This method should returns true if machine code emission is
238 bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
239 MachineCodeEmitter &MCE) {
240 PM.add(new Emitter(MCE));
241 // Delete machine code for this function
242 PM.add(createMachineCodeDeleter());
246 bool Emitter::runOnMachineFunction(MachineFunction &MF) {
247 II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo();
249 MCE.startFunction(MF);
250 MCE.emitConstantPool(MF.getConstantPool());
251 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
253 MCE.finishFunction(MF);
255 // Resolve all forward branches now...
256 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
257 unsigned Location = BasicBlockAddrs[BBRefs[i].first];
258 unsigned Ref = BBRefs[i].second;
259 MCE.emitWordAt(Location-Ref-4, (unsigned*)(intptr_t)Ref);
262 BasicBlockAddrs.clear();
266 void Emitter::emitBasicBlock(const MachineBasicBlock &MBB) {
267 if (uint64_t Addr = MCE.getCurrentPCValue())
268 BasicBlockAddrs[&MBB] = Addr;
270 for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
275 /// emitPCRelativeBlockAddress - This method emits the PC relative address of
276 /// the specified basic block, or if the basic block hasn't been emitted yet
277 /// (because this is a forward branch), it keeps track of the information
278 /// necessary to resolve this address later (and emits a dummy value).
280 void Emitter::emitPCRelativeBlockAddress(const MachineBasicBlock *MBB) {
281 // If this is a backwards branch, we already know the address of the target,
282 // so just emit the value.
283 std::map<const MachineBasicBlock*, unsigned>::iterator I =
284 BasicBlockAddrs.find(MBB);
285 if (I != BasicBlockAddrs.end()) {
286 unsigned Location = I->second;
287 MCE.emitWord(Location-MCE.getCurrentPCValue()-4);
289 // Otherwise, remember where this reference was and where it is to so we can
290 // deal with it later.
291 BBRefs.push_back(std::make_pair(MBB, MCE.getCurrentPCValue()));
296 /// emitPCRelativeValue - Emit a 32-bit PC relative address.
298 void Emitter::emitPCRelativeValue(unsigned Address) {
299 MCE.emitWord(Address-MCE.getCurrentPCValue()-4);
302 /// emitGlobalAddressForCall - Emit the specified address to the code stream
303 /// assuming this is part of a function call, which is PC relative.
305 void Emitter::emitGlobalAddressForCall(GlobalValue *GV) {
306 // Get the address from the backend...
307 unsigned Address = MCE.getGlobalValueAddress(GV);
310 // FIXME: this is JIT specific!
311 Address = getResolver(MCE).addFunctionReference(MCE.getCurrentPCValue(),
314 emitPCRelativeValue(Address);
317 /// emitGlobalAddress - Emit the specified address to the code stream assuming
318 /// this is part of a "take the address of a global" instruction, which is not
321 void Emitter::emitGlobalAddressForPtr(GlobalValue *GV, int Disp /* = 0 */) {
322 // Get the address from the backend...
323 unsigned Address = MCE.getGlobalValueAddress(GV);
325 // If the machine code emitter doesn't know what the address IS yet, we have
326 // to take special measures.
329 // FIXME: this is JIT specific!
330 Address = getResolver(MCE).getLazyResolver((Function*)GV);
333 MCE.emitWord(Address + Disp);
338 /// N86 namespace - Native X86 Register numbers... used by X86 backend.
342 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
347 // getX86RegNum - This function maps LLVM register identifiers to their X86
348 // specific numbering, which is used in various places encoding instructions.
350 static unsigned getX86RegNum(unsigned RegNo) {
352 case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
353 case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
354 case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
355 case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
356 case X86::ESP: case X86::SP: case X86::AH: return N86::ESP;
357 case X86::EBP: case X86::BP: case X86::CH: return N86::EBP;
358 case X86::ESI: case X86::SI: case X86::DH: return N86::ESI;
359 case X86::EDI: case X86::DI: case X86::BH: return N86::EDI;
361 case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3:
362 case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
363 return RegNo-X86::ST0;
365 assert(MRegisterInfo::isVirtualRegister(RegNo) &&
366 "Unknown physical register!");
367 assert(0 && "Register allocator hasn't allocated reg correctly yet!");
372 inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
374 assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
375 return RM | (RegOpcode << 3) | (Mod << 6);
378 void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
379 MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
382 void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
383 // SIB byte is in the same format as the ModRMByte...
384 MCE.emitByte(ModRMByte(SS, Index, Base));
387 void Emitter::emitConstant(unsigned Val, unsigned Size) {
388 // Output the constant in little endian byte order...
389 for (unsigned i = 0; i != Size; ++i) {
390 MCE.emitByte(Val & 255);
395 static bool isDisp8(int Value) {
396 return Value == (signed char)Value;
399 void Emitter::emitMemModRMByte(const MachineInstr &MI,
400 unsigned Op, unsigned RegOpcodeField) {
401 const MachineOperand &Op3 = MI.getOperand(Op+3);
405 if (Op3.isGlobalAddress()) {
406 GV = Op3.getGlobal();
407 DispVal = Op3.getOffset();
409 DispVal = Op3.getImmedValue();
412 const MachineOperand &Base = MI.getOperand(Op);
413 const MachineOperand &Scale = MI.getOperand(Op+1);
414 const MachineOperand &IndexReg = MI.getOperand(Op+2);
416 unsigned BaseReg = 0;
418 if (Base.isConstantPoolIndex()) {
419 // Emit a direct address reference [disp32] where the displacement of the
420 // constant pool entry is controlled by the MCE.
421 assert(!GV && "Constant Pool reference cannot be relative to global!");
422 DispVal += MCE.getConstantPoolEntryAddress(Base.getConstantPoolIndex());
424 BaseReg = Base.getReg();
427 // Is a SIB byte needed?
428 if (IndexReg.getReg() == 0 && BaseReg != X86::ESP) {
429 if (BaseReg == 0) { // Just a displacement?
430 // Emit special case [disp32] encoding
431 MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
433 emitGlobalAddressForPtr(GV, DispVal);
435 emitConstant(DispVal, 4);
437 unsigned BaseRegNo = getX86RegNum(BaseReg);
439 // Emit the most general non-SIB encoding: [REG+disp32]
440 MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
441 emitGlobalAddressForPtr(GV, DispVal);
442 } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
443 // Emit simple indirect register encoding... [EAX] f.e.
444 MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
445 } else if (isDisp8(DispVal)) {
446 // Emit the disp8 encoding... [REG+disp8]
447 MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
448 emitConstant(DispVal, 1);
450 // Emit the most general non-SIB encoding: [REG+disp32]
451 MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
452 emitConstant(DispVal, 4);
456 } else { // We need a SIB byte, so start by outputting the ModR/M byte first
457 assert(IndexReg.getReg() != X86::ESP && "Cannot use ESP as index reg!");
459 bool ForceDisp32 = false;
460 bool ForceDisp8 = false;
462 // If there is no base register, we emit the special case SIB byte with
463 // MOD=0, BASE=5, to JUST get the index, scale, and displacement.
464 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
467 // Emit the normal disp32 encoding...
468 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
470 } else if (DispVal == 0 && BaseReg != X86::EBP) {
471 // Emit no displacement ModR/M byte
472 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
473 } else if (isDisp8(DispVal)) {
474 // Emit the disp8 encoding...
475 MCE.emitByte(ModRMByte(1, RegOpcodeField, 4));
476 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
478 // Emit the normal disp32 encoding...
479 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
482 // Calculate what the SS field value should be...
483 static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 };
484 unsigned SS = SSTable[Scale.getImmedValue()];
487 // Handle the SIB byte for the case where there is no base. The
488 // displacement has already been output.
489 assert(IndexReg.getReg() && "Index register must be specified!");
490 emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
492 unsigned BaseRegNo = getX86RegNum(BaseReg);
494 if (IndexReg.getReg())
495 IndexRegNo = getX86RegNum(IndexReg.getReg());
497 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
498 emitSIBByte(SS, IndexRegNo, BaseRegNo);
501 // Do we need to output a displacement?
502 if (DispVal != 0 || ForceDisp32 || ForceDisp8) {
503 if (!ForceDisp32 && isDisp8(DispVal))
504 emitConstant(DispVal, 1);
506 emitGlobalAddressForPtr(GV, DispVal);
508 emitConstant(DispVal, 4);
513 static unsigned sizeOfImm(const TargetInstrDescriptor &Desc) {
514 switch (Desc.TSFlags & X86II::ImmMask) {
515 case X86II::Imm8: return 1;
516 case X86II::Imm16: return 2;
517 case X86II::Imm32: return 4;
518 default: assert(0 && "Immediate size not set!");
523 void Emitter::emitInstruction(const MachineInstr &MI) {
524 NumEmitted++; // Keep track of the # of mi's emitted
526 unsigned Opcode = MI.getOpcode();
527 const TargetInstrDescriptor &Desc = II->get(Opcode);
529 // Emit the repeat opcode prefix as needed.
530 if ((Desc.TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3);
532 // Emit instruction prefixes if necessary
533 if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
535 switch (Desc.TSFlags & X86II::Op0Mask) {
537 MCE.emitByte(0x0F); // Two-byte opcode prefix
539 case X86II::REP: break; // already handled.
540 case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
541 case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
543 (((Desc.TSFlags & X86II::Op0Mask)-X86II::D8)
544 >> X86II::Op0Shift));
545 break; // Two-byte opcode prefix
546 default: assert(0 && "Invalid prefix!");
547 case 0: break; // No prefix!
550 unsigned char BaseOpcode = II->getBaseOpcodeFor(Opcode);
551 switch (Desc.TSFlags & X86II::FormMask) {
552 default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
554 if (Opcode != X86::IMPLICIT_USE &&
555 Opcode != X86::IMPLICIT_DEF &&
556 Opcode != X86::FP_REG_KILL)
557 std::cerr << "X86 Machine Code Emitter: No 'form', not emitting: " << MI;
561 MCE.emitByte(BaseOpcode);
562 if (MI.getNumOperands() == 1) {
563 const MachineOperand &MO = MI.getOperand(0);
564 if (MO.isMachineBasicBlock()) {
565 emitPCRelativeBlockAddress(MO.getMachineBasicBlock());
566 } else if (MO.isGlobalAddress()) {
567 assert(MO.isPCRelative() && "Call target is not PC Relative?");
568 emitGlobalAddressForCall(MO.getGlobal());
569 } else if (MO.isExternalSymbol()) {
570 unsigned Address = MCE.getGlobalValueAddress(MO.getSymbolName());
571 assert(Address && "Unknown external symbol!");
572 emitPCRelativeValue(Address);
573 } else if (MO.isImmediate()) {
574 emitConstant(MO.getImmedValue(), sizeOfImm(Desc));
576 assert(0 && "Unknown RawFrm operand!");
581 case X86II::AddRegFrm:
582 MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
583 if (MI.getNumOperands() == 2) {
584 const MachineOperand &MO1 = MI.getOperand(1);
585 if (Value *V = MO1.getVRegValueOrNull()) {
586 assert(sizeOfImm(Desc) == 4 &&
587 "Don't know how to emit non-pointer values!");
588 emitGlobalAddressForPtr(cast<GlobalValue>(V));
589 } else if (MO1.isGlobalAddress()) {
590 assert(sizeOfImm(Desc) == 4 &&
591 "Don't know how to emit non-pointer values!");
592 assert(!MO1.isPCRelative() && "Function pointer ref is PC relative?");
593 emitGlobalAddressForPtr(MO1.getGlobal(), MO1.getOffset());
594 } else if (MO1.isExternalSymbol()) {
595 assert(sizeOfImm(Desc) == 4 &&
596 "Don't know how to emit non-pointer values!");
597 unsigned Address = MCE.getGlobalValueAddress(MO1.getSymbolName());
598 assert(Address && "Unknown external symbol!");
599 MCE.emitWord(Address);
601 emitConstant(MO1.getImmedValue(), sizeOfImm(Desc));
606 case X86II::MRMDestReg: {
607 MCE.emitByte(BaseOpcode);
608 emitRegModRMByte(MI.getOperand(0).getReg(),
609 getX86RegNum(MI.getOperand(1).getReg()));
610 if (MI.getNumOperands() == 3)
611 emitConstant(MI.getOperand(2).getImmedValue(), sizeOfImm(Desc));
614 case X86II::MRMDestMem:
615 MCE.emitByte(BaseOpcode);
616 emitMemModRMByte(MI, 0, getX86RegNum(MI.getOperand(4).getReg()));
617 if (MI.getNumOperands() == 6)
618 emitConstant(MI.getOperand(5).getImmedValue(), sizeOfImm(Desc));
621 case X86II::MRMSrcReg:
622 MCE.emitByte(BaseOpcode);
624 emitRegModRMByte(MI.getOperand(1).getReg(),
625 getX86RegNum(MI.getOperand(0).getReg()));
626 if (MI.getNumOperands() == 3)
627 emitConstant(MI.getOperand(2).getImmedValue(), sizeOfImm(Desc));
630 case X86II::MRMSrcMem:
631 MCE.emitByte(BaseOpcode);
632 emitMemModRMByte(MI, 1, getX86RegNum(MI.getOperand(0).getReg()));
633 if (MI.getNumOperands() == 2+4)
634 emitConstant(MI.getOperand(5).getImmedValue(), sizeOfImm(Desc));
637 case X86II::MRM0r: case X86II::MRM1r:
638 case X86II::MRM2r: case X86II::MRM3r:
639 case X86II::MRM4r: case X86II::MRM5r:
640 case X86II::MRM6r: case X86II::MRM7r:
641 MCE.emitByte(BaseOpcode);
642 emitRegModRMByte(MI.getOperand(0).getReg(),
643 (Desc.TSFlags & X86II::FormMask)-X86II::MRM0r);
645 if (MI.getOperand(MI.getNumOperands()-1).isImmediate()) {
646 emitConstant(MI.getOperand(MI.getNumOperands()-1).getImmedValue(), sizeOfImm(Desc));
650 case X86II::MRM0m: case X86II::MRM1m:
651 case X86II::MRM2m: case X86II::MRM3m:
652 case X86II::MRM4m: case X86II::MRM5m:
653 case X86II::MRM6m: case X86II::MRM7m:
654 MCE.emitByte(BaseOpcode);
655 emitMemModRMByte(MI, 0, (Desc.TSFlags & X86II::FormMask)-X86II::MRM0m);
657 if (MI.getNumOperands() == 5) {
658 if (MI.getOperand(4).isImmediate())
659 emitConstant(MI.getOperand(4).getImmedValue(), sizeOfImm(Desc));
660 else if (MI.getOperand(4).isGlobalAddress())
661 emitGlobalAddressForPtr(MI.getOperand(4).getGlobal(),
662 MI.getOperand(4).getOffset());
664 assert(0 && "Unknown operand!");