1 //===-- X86FixupLEAs.cpp - use or replace LEA instructions -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the pass which will find instructions which
11 // can be re-written as LEA instructions in order to reduce pipeline
12 // delays for some models of the Intel Atom family.
14 //===----------------------------------------------------------------------===//
17 #include "X86InstrInfo.h"
18 #include "X86Subtarget.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveVariables.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/Target/TargetInstrInfo.h"
30 #define DEBUG_TYPE "x86-fixup-LEAs"
32 STATISTIC(NumLEAs, "Number of LEA instructions created");
35 class FixupLEAPass : public MachineFunctionPass {
36 enum RegUsageState { RU_NotUsed, RU_Write, RU_Read };
38 /// \brief Loop over all of the instructions in the basic block
39 /// replacing applicable instructions with LEA instructions,
40 /// where appropriate.
41 bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
43 const char *getPassName() const override { return "X86 Atom LEA Fixup";}
45 /// \brief Given a machine register, look for the instruction
46 /// which writes it in the current basic block. If found,
47 /// try to replace it with an equivalent LEA instruction.
48 /// If replacement succeeds, then also process the the newly created
50 void seekLEAFixup(MachineOperand& p, MachineBasicBlock::iterator& I,
51 MachineFunction::iterator MFI);
53 /// \brief Given a memory access or LEA instruction
54 /// whose address mode uses a base and/or index register, look for
55 /// an opportunity to replace the instruction which sets the base or index
56 /// register with an equivalent LEA instruction.
57 void processInstruction(MachineBasicBlock::iterator& I,
58 MachineFunction::iterator MFI);
60 /// \brief Determine if an instruction references a machine register
61 /// and, if so, whether it reads or writes the register.
62 RegUsageState usesRegister(MachineOperand& p,
63 MachineBasicBlock::iterator I);
65 /// \brief Step backwards through a basic block, looking
66 /// for an instruction which writes a register within
67 /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
68 MachineBasicBlock::iterator searchBackwards(MachineOperand& p,
69 MachineBasicBlock::iterator& I,
70 MachineFunction::iterator MFI);
72 /// \brief if an instruction can be converted to an
73 /// equivalent LEA, insert the new instruction into the basic block
74 /// and return a pointer to it. Otherwise, return zero.
75 MachineInstr* postRAConvertToLEA(MachineFunction::iterator &MFI,
76 MachineBasicBlock::iterator &MBBI) const;
79 FixupLEAPass() : MachineFunctionPass(ID) {}
81 /// \brief Loop over all of the basic blocks,
82 /// replacing instructions by equivalent LEA instructions
83 /// if needed and when possible.
84 bool runOnMachineFunction(MachineFunction &MF) override;
88 const TargetMachine *TM;
89 const TargetInstrInfo *TII; // Machine instruction info.
92 char FixupLEAPass::ID = 0;
96 FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
97 MachineBasicBlock::iterator &MBBI) const {
98 MachineInstr* MI = MBBI;
100 switch (MI->getOpcode()) {
103 const MachineOperand& Src = MI->getOperand(1);
104 const MachineOperand& Dest = MI->getOperand(0);
105 NewMI = BuildMI(*MF, MI->getDebugLoc(),
106 TII->get( MI->getOpcode() == X86::MOV32rr ? X86::LEA32r : X86::LEA64r))
108 .addOperand(Src).addImm(1).addReg(0).addImm(0).addReg(0);
109 MFI->insert(MBBI, NewMI); // Insert the new inst
114 case X86::ADD64ri32_DB:
115 case X86::ADD64ri8_DB:
118 case X86::ADD32ri_DB:
119 case X86::ADD32ri8_DB:
122 case X86::ADD16ri_DB:
123 case X86::ADD16ri8_DB:
124 if (!MI->getOperand(2).isImm()) {
125 // convertToThreeAddress will call getImm()
126 // which requires isImm() to be true
131 case X86::ADD16rr_DB:
132 if (MI->getOperand(1).getReg() != MI->getOperand(2).getReg()) {
133 // if src1 != src2, then convertToThreeAddress will
134 // need to create a Virtual register, which we cannot do
135 // after register allocation.
139 return TII->convertToThreeAddress(MFI, MBBI, 0);
142 FunctionPass *llvm::createX86FixupLEAs() {
143 return new FixupLEAPass();
146 bool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) {
148 TM = &MF->getTarget();
149 TII = TM->getInstrInfo();
151 DEBUG(dbgs() << "Start X86FixupLEAs\n";);
152 // Process all basic blocks.
153 for (MachineFunction::iterator I = Func.begin(), E = Func.end(); I != E; ++I)
154 processBasicBlock(Func, I);
155 DEBUG(dbgs() << "End X86FixupLEAs\n";);
160 FixupLEAPass::RegUsageState FixupLEAPass::usesRegister(MachineOperand& p,
161 MachineBasicBlock::iterator I) {
162 RegUsageState RegUsage = RU_NotUsed;
163 MachineInstr* MI = I;
165 for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
166 MachineOperand& opnd = MI->getOperand(i);
167 if (opnd.isReg() && opnd.getReg() == p.getReg()){
176 /// getPreviousInstr - Given a reference to an instruction in a basic
177 /// block, return a reference to the previous instruction in the block,
178 /// wrapping around to the last instruction of the block if the block
179 /// branches to itself.
180 static inline bool getPreviousInstr(MachineBasicBlock::iterator& I,
181 MachineFunction::iterator MFI) {
182 if (I == MFI->begin()) {
183 if (MFI->isPredecessor(MFI)) {
194 MachineBasicBlock::iterator FixupLEAPass::searchBackwards(MachineOperand& p,
195 MachineBasicBlock::iterator& I,
196 MachineFunction::iterator MFI) {
197 int InstrDistance = 1;
198 MachineBasicBlock::iterator CurInst;
199 static const int INSTR_DISTANCE_THRESHOLD = 5;
203 Found = getPreviousInstr(CurInst, MFI);
204 while( Found && I != CurInst) {
205 if (CurInst->isCall() || CurInst->isInlineAsm())
207 if (InstrDistance > INSTR_DISTANCE_THRESHOLD)
208 break; // too far back to make a difference
209 if (usesRegister(p, CurInst) == RU_Write){
212 InstrDistance += TII->getInstrLatency(TM->getInstrItineraryData(), CurInst);
213 Found = getPreviousInstr(CurInst, MFI);
218 void FixupLEAPass::processInstruction(MachineBasicBlock::iterator& I,
219 MachineFunction::iterator MFI) {
220 // Process a load, store, or LEA instruction.
221 MachineInstr *MI = I;
222 int opcode = MI->getOpcode();
223 const MCInstrDesc& Desc = MI->getDesc();
224 int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode);
225 if (AddrOffset >= 0) {
226 AddrOffset += X86II::getOperandBias(Desc);
227 MachineOperand& p = MI->getOperand(AddrOffset + X86::AddrBaseReg);
228 if (p.isReg() && p.getReg() != X86::ESP) {
229 seekLEAFixup(p, I, MFI);
231 MachineOperand& q = MI->getOperand(AddrOffset + X86::AddrIndexReg);
232 if (q.isReg() && q.getReg() != X86::ESP) {
233 seekLEAFixup(q, I, MFI);
238 void FixupLEAPass::seekLEAFixup(MachineOperand& p,
239 MachineBasicBlock::iterator& I,
240 MachineFunction::iterator MFI) {
241 MachineBasicBlock::iterator MBI = searchBackwards(p, I, MFI);
243 MachineInstr* NewMI = postRAConvertToLEA(MFI, MBI);
246 DEBUG(dbgs() << "Candidate to replace:"; MBI->dump(););
247 // now to replace with an equivalent LEA...
248 DEBUG(dbgs() << "Replaced by: "; NewMI->dump(););
250 MachineBasicBlock::iterator J =
251 static_cast<MachineBasicBlock::iterator> (NewMI);
252 processInstruction(J, MFI);
257 bool FixupLEAPass::processBasicBlock(MachineFunction &MF,
258 MachineFunction::iterator MFI) {
260 for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I)
261 processInstruction(I, MFI);