1 //===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
3 // This file defines the pass which converts floating point instructions from
4 // virtual registers into register stack instructions.
6 //===----------------------------------------------------------------------===//
9 #include "X86InstrInfo.h"
10 #include "llvm/CodeGen/MachineFunctionPass.h"
11 #include "llvm/CodeGen/MachineInstrBuilder.h"
12 #include "llvm/CodeGen/LiveVariables.h"
13 #include "llvm/Target/TargetInstrInfo.h"
14 #include "llvm/Target/TargetMachine.h"
15 #include "Support/Debug.h"
16 #include "Support/Statistic.h"
21 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
22 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions");
24 struct FPS : public MachineFunctionPass {
25 virtual bool runOnMachineFunction(MachineFunction &MF);
27 virtual const char *getPassName() const { return "X86 FP Stackifier"; }
29 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
30 AU.addRequired<LiveVariables>();
31 MachineFunctionPass::getAnalysisUsage(AU);
34 LiveVariables *LV; // Live variable info for current function...
35 MachineBasicBlock *MBB; // Current basic block
36 unsigned Stack[8]; // FP<n> Registers in each stack slot...
37 unsigned RegMap[8]; // Track which stack slot contains each register
38 unsigned StackTop; // The current top of the FP stack.
40 void dumpStack() const {
41 std::cerr << "Stack contents:";
42 for (unsigned i = 0; i != StackTop; ++i) {
43 std::cerr << " FP" << Stack[i];
44 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!");
49 // getSlot - Return the stack slot number a particular register number is
51 unsigned getSlot(unsigned RegNo) const {
52 assert(RegNo < 8 && "Regno out of range!");
56 // getStackEntry - Return the X86::FP<n> register in register ST(i)
57 unsigned getStackEntry(unsigned STi) const {
58 assert(STi < StackTop && "Access past stack top!");
59 return Stack[StackTop-1-STi];
62 // getSTReg - Return the X86::ST(i) register which contains the specified
64 unsigned getSTReg(unsigned RegNo) const {
65 return StackTop - 1 - getSlot(RegNo) + X86::ST0;
68 // pushReg - Push the specifiex FP<n> register onto the stack
69 void pushReg(unsigned Reg) {
70 assert(Reg < 8 && "Register number out of range!");
71 assert(StackTop < 8 && "Stack overflow!");
72 Stack[StackTop] = Reg;
73 RegMap[Reg] = StackTop++;
76 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; }
77 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) {
78 if (!isAtTop(RegNo)) {
79 unsigned Slot = getSlot(RegNo);
80 unsigned STReg = getSTReg(RegNo);
81 unsigned RegOnTop = getStackEntry(0);
83 // Swap the slots the regs are in
84 std::swap(RegMap[RegNo], RegMap[RegOnTop]);
86 // Swap stack slot contents
87 assert(RegMap[RegOnTop] < StackTop);
88 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]);
90 // Emit an fxch to update the runtime processors version of the state
91 MachineInstr *MI = BuildMI(X86::FXCH, 1).addReg(STReg);
92 I = 1+MBB->insert(I, MI);
97 void duplicateToTop(unsigned RegNo, unsigned AsReg,
98 MachineBasicBlock::iterator &I) {
99 unsigned STReg = getSTReg(RegNo);
100 pushReg(AsReg); // New register on top of stack
102 MachineInstr *MI = BuildMI(X86::FLDrr, 1).addReg(STReg);
103 I = 1+MBB->insert(I, MI);
106 // popStackAfter - Pop the current value off of the top of the FP stack
107 // after the specified instruction.
108 void popStackAfter(MachineBasicBlock::iterator &I);
110 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
112 void handleZeroArgFP(MachineBasicBlock::iterator &I);
113 void handleOneArgFP(MachineBasicBlock::iterator &I);
114 void handleTwoArgFP(MachineBasicBlock::iterator &I);
115 void handleSpecialFP(MachineBasicBlock::iterator &I);
119 Pass *createX86FloatingPointStackifierPass() { return new FPS(); }
121 /// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
122 /// register references into FP stack references.
124 bool FPS::runOnMachineFunction(MachineFunction &MF) {
125 LV = &getAnalysis<LiveVariables>();
128 bool Changed = false;
129 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
130 Changed |= processBasicBlock(MF, *I);
134 /// processBasicBlock - Loop over all of the instructions in the basic block,
135 /// transforming FP instructions into their stack form.
137 bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
138 const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
139 bool Changed = false;
142 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
143 MachineInstr *MI = *I;
144 MachineInstr *PrevMI = I == BB.begin() ? 0 : *(I-1);
145 unsigned Flags = TII.get(MI->getOpcode()).TSFlags;
147 if ((Flags & X86II::FPTypeMask) == 0) continue; // Ignore non-fp insts!
149 ++NumFP; // Keep track of # of pseudo instrs
150 DEBUG(std::cerr << "\nFPInst:\t";
151 MI->print(std::cerr, MF.getTarget()));
153 // Get dead variables list now because the MI pointer may be deleted as part
155 LiveVariables::killed_iterator IB = LV->dead_begin(MI);
156 LiveVariables::killed_iterator IE = LV->dead_end(MI);
158 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo();
159 LiveVariables::killed_iterator I = LV->killed_begin(MI);
160 LiveVariables::killed_iterator E = LV->killed_end(MI);
162 std::cerr << "Killed Operands:";
164 std::cerr << " %" << MRI->getName(I->second);
168 switch (Flags & X86II::FPTypeMask) {
169 case X86II::ZeroArgFP: handleZeroArgFP(I); break;
170 case X86II::OneArgFP: handleOneArgFP(I); break;
172 case X86II::OneArgFPRW: // ST(0) = fsqrt(ST(0))
173 assert(0 && "FP instr type not handled yet!");
175 case X86II::TwoArgFP: handleTwoArgFP(I); break;
176 case X86II::SpecialFP: handleSpecialFP(I); break;
177 default: assert(0 && "Unknown FP Type!");
180 // Check to see if any of the values defined by this instruction are dead
181 // after definition. If so, pop them.
182 for (; IB != IE; ++IB) {
183 unsigned Reg = IB->second;
184 if (Reg >= X86::FP0 && Reg <= X86::FP6) {
185 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
186 ++I; // Insert fxch AFTER the instruction
187 moveToTop(Reg-X86::FP0, I); // Insert fxch if neccesary
188 --I; // Move to fxch or old instruction
189 popStackAfter(I); // Pop the top of the stack, killing value
193 // Print out all of the instructions expanded to if -debug
194 DEBUG(if (*I == PrevMI) {
195 std::cerr<< "Just deleted pseudo instruction\n";
197 MachineBasicBlock::iterator Start = I;
198 // Rewind to first instruction newly inserted.
199 while (Start != BB.begin() && *(Start-1) != PrevMI) --Start;
200 std::cerr << "Inserted instructions:\n\t";
201 (*Start)->print(std::cerr, MF.getTarget());
202 while (++Start != I+1);
210 assert(StackTop == 0 && "Stack not empty at end of basic block?");
214 //===----------------------------------------------------------------------===//
215 // Efficient Lookup Table Support
216 //===----------------------------------------------------------------------===//
221 bool operator<(const TableEntry &TE) const { return from < TE.from; }
222 bool operator<(unsigned V) const { return from < V; }
225 static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
226 for (unsigned i = 0; i != NumEntries-1; ++i)
227 if (!(Table[i] < Table[i+1])) return false;
231 static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) {
232 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode);
233 if (I != Table+N && I->from == Opcode)
238 #define ARRAY_SIZE(TABLE) \
239 (sizeof(TABLE)/sizeof(TABLE[0]))
242 #define ASSERT_SORTED(TABLE)
244 #define ASSERT_SORTED(TABLE) \
245 { static bool TABLE##Checked = false; \
246 if (!TABLE##Checked) \
247 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \
248 "All lookup tables must be sorted for efficient access!"); \
253 //===----------------------------------------------------------------------===//
255 //===----------------------------------------------------------------------===//
257 // PopTable - Sorted map of instructions to their popping version. The first
258 // element is an instruction, the second is the version which pops.
260 static const TableEntry PopTable[] = {
261 { X86::FSTr32 , X86::FSTPr32 },
262 { X86::FSTr64 , X86::FSTPr64 },
263 { X86::FSTrr , X86::FSTPrr },
264 { X86::FISTr16 , X86::FISTPr16 },
265 { X86::FISTr32 , X86::FISTPr32 },
267 { X86::FADDrST0 , X86::FADDPrST0 },
268 { X86::FSUBrST0 , X86::FSUBPrST0 },
269 { X86::FSUBRrST0, X86::FSUBRPrST0 },
270 { X86::FMULrST0 , X86::FMULPrST0 },
271 { X86::FDIVrST0 , X86::FDIVPrST0 },
272 { X86::FDIVRrST0, X86::FDIVRPrST0 },
274 { X86::FUCOMr , X86::FUCOMPr },
275 { X86::FUCOMPr , X86::FUCOMPPr },
278 /// popStackAfter - Pop the current value off of the top of the FP stack after
279 /// the specified instruction. This attempts to be sneaky and combine the pop
280 /// into the instruction itself if possible. The iterator is left pointing to
281 /// the last instruction, be it a new pop instruction inserted, or the old
282 /// instruction if it was modified in place.
284 void FPS::popStackAfter(MachineBasicBlock::iterator &I) {
285 ASSERT_SORTED(PopTable);
286 assert(StackTop > 0 && "Cannot pop empty stack!");
287 RegMap[Stack[--StackTop]] = ~0; // Update state
289 // Check to see if there is a popping version of this instruction...
290 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), (*I)->getOpcode());
292 (*I)->setOpcode(Opcode);
293 if (Opcode == X86::FUCOMPPr)
294 (*I)->RemoveOperand(0);
296 } else { // Insert an explicit pop
297 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(X86::ST0);
298 I = MBB->insert(I+1, MI);
302 static unsigned getFPReg(const MachineOperand &MO) {
303 assert(MO.isPhysicalRegister() && "Expected an FP register!");
304 unsigned Reg = MO.getReg();
305 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
306 return Reg - X86::FP0;
310 //===----------------------------------------------------------------------===//
311 // Instruction transformation implementation
312 //===----------------------------------------------------------------------===//
314 /// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem>
316 void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) {
317 MachineInstr *MI = *I;
318 unsigned DestReg = getFPReg(MI->getOperand(0));
319 MI->RemoveOperand(0); // Remove the explicit ST(0) operand
321 // Result gets pushed on the stack...
325 /// handleOneArgFP - fst ST(0), <mem>
327 void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
328 MachineInstr *MI = *I;
329 assert(MI->getNumOperands() == 5 && "Can only handle fst* instructions!");
331 unsigned Reg = getFPReg(MI->getOperand(4));
332 bool KillsSrc = false;
333 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
334 E = LV->killed_end(MI); KI != E; ++KI)
335 KillsSrc |= KI->second == X86::FP0+Reg;
337 // FSTPr80 and FISTPr64 are strange because there are no non-popping versions.
338 // If we have one _and_ we don't want to pop the operand, duplicate the value
339 // on the stack instead of moving it. This ensure that popping the value is
342 if ((MI->getOpcode() == X86::FSTPr80 ||
343 MI->getOpcode() == X86::FISTPr64) && !KillsSrc) {
344 duplicateToTop(Reg, 7 /*temp register*/, I);
346 moveToTop(Reg, I); // Move to the top of the stack...
348 MI->RemoveOperand(4); // Remove explicit ST(0) operand
350 if (MI->getOpcode() == X86::FSTPr80 || MI->getOpcode() == X86::FISTPr64) {
351 assert(StackTop > 0 && "Stack empty??");
353 } else if (KillsSrc) { // Last use of operand?
358 //===----------------------------------------------------------------------===//
359 // Define tables of various ways to map pseudo instructions
362 // ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
363 static const TableEntry ForwardST0Table[] = {
364 { X86::FpADD, X86::FADDST0r },
365 { X86::FpSUB, X86::FSUBST0r },
366 { X86::FpMUL, X86::FMULST0r },
367 { X86::FpDIV, X86::FDIVST0r },
368 { X86::FpUCOM, X86::FUCOMr },
371 // ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
372 static const TableEntry ReverseST0Table[] = {
373 { X86::FpADD, X86::FADDST0r }, // commutative
374 { X86::FpSUB, X86::FSUBRST0r },
375 { X86::FpMUL, X86::FMULST0r }, // commutative
376 { X86::FpDIV, X86::FDIVRST0r },
380 // ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
381 static const TableEntry ForwardSTiTable[] = {
382 { X86::FpADD, X86::FADDrST0 }, // commutative
383 { X86::FpSUB, X86::FSUBRrST0 },
384 { X86::FpMUL, X86::FMULrST0 }, // commutative
385 { X86::FpDIV, X86::FDIVRrST0 },
386 { X86::FpUCOM, X86::FUCOMr },
389 // ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
390 static const TableEntry ReverseSTiTable[] = {
391 { X86::FpADD, X86::FADDrST0 },
392 { X86::FpSUB, X86::FSUBrST0 },
393 { X86::FpMUL, X86::FMULrST0 },
394 { X86::FpDIV, X86::FDIVrST0 },
399 /// handleTwoArgFP - Handle instructions like FADD and friends which are virtual
400 /// instructions which need to be simplified and possibly transformed.
402 /// Result: ST(0) = fsub ST(0), ST(i)
403 /// ST(i) = fsub ST(0), ST(i)
404 /// ST(0) = fsubr ST(0), ST(i)
405 /// ST(i) = fsubr ST(0), ST(i)
407 /// In addition to three address instructions, this also handles the FpUCOM
408 /// instruction which only has two operands, but no destination. This
409 /// instruction is also annoying because there is no "reverse" form of it
412 void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
413 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
414 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable);
415 MachineInstr *MI = *I;
417 unsigned NumOperands = MI->getNumOperands();
418 assert(NumOperands == 3 ||
419 (NumOperands == 2 && MI->getOpcode() == X86::FpUCOM) &&
420 "Illegal TwoArgFP instruction!");
421 unsigned Dest = getFPReg(MI->getOperand(0));
422 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
423 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
424 bool KillsOp0 = false, KillsOp1 = false;
426 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
427 E = LV->killed_end(MI); KI != E; ++KI) {
428 KillsOp0 |= (KI->second == X86::FP0+Op0);
429 KillsOp1 |= (KI->second == X86::FP0+Op1);
432 // If this is an FpUCOM instruction, we must make sure the first operand is on
433 // the top of stack, the other one can be anywhere...
434 if (MI->getOpcode() == X86::FpUCOM)
437 unsigned TOS = getStackEntry(0);
439 // One of our operands must be on the top of the stack. If neither is yet, we
441 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
442 // We can choose to move either operand to the top of the stack. If one of
443 // the operands is killed by this instruction, we want that one so that we
444 // can update right on top of the old version.
446 moveToTop(Op0, I); // Move dead operand to TOS.
448 } else if (KillsOp1) {
452 // All of the operands are live after this instruction executes, so we
453 // cannot update on top of any operand. Because of this, we must
454 // duplicate one of the stack elements to the top. It doesn't matter
455 // which one we pick.
457 duplicateToTop(Op0, Dest, I);
461 } else if (!KillsOp0 && !KillsOp1 && MI->getOpcode() != X86::FpUCOM) {
462 // If we DO have one of our operands at the top of the stack, but we don't
463 // have a dead operand, we must duplicate one of the operands to a new slot
465 duplicateToTop(Op0, Dest, I);
470 // Now we know that one of our operands is on the top of the stack, and at
471 // least one of our operands is killed by this instruction.
472 assert((TOS == Op0 || TOS == Op1) &&
473 (KillsOp0 || KillsOp1 || MI->getOpcode() == X86::FpUCOM) &&
474 "Stack conditions not set up right!");
476 // We decide which form to use based on what is on the top of the stack, and
477 // which operand is killed by this instruction.
478 const TableEntry *InstTable;
479 bool isForward = TOS == Op0;
480 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
483 InstTable = ForwardST0Table;
485 InstTable = ReverseST0Table;
488 InstTable = ForwardSTiTable;
490 InstTable = ReverseSTiTable;
493 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode());
494 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!");
496 // NotTOS - The register which is not on the top of stack...
497 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
499 // Replace the old instruction with a new instruction
500 *I = BuildMI(Opcode, 1).addReg(getSTReg(NotTOS));
502 // If both operands are killed, pop one off of the stack in addition to
503 // overwriting the other one.
504 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
505 assert(!updateST0 && "Should have updated other operand!");
506 popStackAfter(I); // Pop the top of stack
509 // Insert an explicit pop of the "updated" operand for FUCOM
510 if (MI->getOpcode() == X86::FpUCOM) {
511 if (KillsOp0 && !KillsOp1)
512 popStackAfter(I); // If we kill the first operand, pop it!
513 else if (KillsOp1 && Op0 != Op1) {
514 if (getStackEntry(0) == Op1) {
515 popStackAfter(I); // If it's right at the top of stack, just pop it
517 // Otherwise, move the top of stack into the dead slot, killing the
518 // operand without having to add in an explicit xchg then pop.
520 unsigned STReg = getSTReg(Op1);
521 unsigned OldSlot = getSlot(Op1);
522 unsigned TopReg = Stack[StackTop-1];
523 Stack[OldSlot] = TopReg;
524 RegMap[TopReg] = OldSlot;
526 Stack[--StackTop] = ~0;
528 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(STReg);
529 I = MBB->insert(I+1, MI);
534 // Update stack information so that we know the destination register is now on
536 if (MI->getOpcode() != X86::FpUCOM) {
537 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS);
538 assert(UpdatedSlot < StackTop && Dest < 7);
539 Stack[UpdatedSlot] = Dest;
540 RegMap[Dest] = UpdatedSlot;
542 delete MI; // Remove the old instruction
546 /// handleSpecialFP - Handle special instructions which behave unlike other
547 /// floating point instructions. This is primarily inteaded for use by pseudo
550 void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
551 MachineInstr *MI = *I;
552 switch (MI->getOpcode()) {
553 default: assert(0 && "Unknown SpecialFP instruction!");
554 case X86::FpGETRESULT: // Appears immediately after a call returning FP type!
555 assert(StackTop == 0 && "Stack should be empty after a call!");
556 pushReg(getFPReg(MI->getOperand(0)));
558 case X86::FpSETRESULT:
559 assert(StackTop == 1 && "Stack should have one element on it to return!");
560 --StackTop; // "Forget" we have something on the top of stack!
563 unsigned SrcReg = getFPReg(MI->getOperand(1));
564 unsigned DestReg = getFPReg(MI->getOperand(0));
565 bool KillsSrc = false;
566 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
567 E = LV->killed_end(MI); KI != E; ++KI)
568 KillsSrc |= KI->second == X86::FP0+SrcReg;
571 // If the input operand is killed, we can just change the owner of the
572 // incoming stack slot into the result.
573 unsigned Slot = getSlot(SrcReg);
574 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!");
575 Stack[Slot] = DestReg;
576 RegMap[DestReg] = Slot;
579 // For FMOV we just duplicate the specified value to a new stack slot.
580 // This could be made better, but would require substantial changes.
581 duplicateToTop(SrcReg, DestReg, I);
587 I = MBB->erase(I)-1; // Remove the pseudo instruction