1 //===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the pass which converts floating point instructions from
11 // virtual registers into register stack instructions. This pass uses live
12 // variable information to indicate where the FPn registers are used and their
15 // This pass is hampered by the lack of decent CFG manipulation routines for
16 // machine code. In particular, this wants to be able to split critical edges
17 // as necessary, traverse the machine basic block CFG in depth-first order, and
18 // allow there to be multiple machine basic blocks for each LLVM basicblock
19 // (needed for critical edge splitting).
21 // In particular, this pass currently barfs on critical edges. Because of this,
22 // it requires the instruction selector to insert FP_REG_KILL instructions on
23 // the exits of any basic block that has critical edges going from it, or which
24 // branch to a critical basic block.
26 // FIXME: this is not implemented yet. The stackifier pass only works on local
29 //===----------------------------------------------------------------------===//
31 #define DEBUG_TYPE "fp"
33 #include "X86InstrInfo.h"
34 #include "llvm/CodeGen/MachineFunctionPass.h"
35 #include "llvm/CodeGen/MachineInstrBuilder.h"
36 #include "llvm/CodeGen/LiveVariables.h"
37 #include "llvm/CodeGen/Passes.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "Support/Debug.h"
41 #include "Support/DepthFirstIterator.h"
42 #include "Support/Statistic.h"
43 #include "Support/STLExtras.h"
49 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
50 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions");
52 struct FPS : public MachineFunctionPass {
53 virtual bool runOnMachineFunction(MachineFunction &MF);
55 virtual const char *getPassName() const { return "X86 FP Stackifier"; }
57 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
58 AU.addRequired<LiveVariables>();
59 MachineFunctionPass::getAnalysisUsage(AU);
62 LiveVariables *LV; // Live variable info for current function...
63 MachineBasicBlock *MBB; // Current basic block
64 unsigned Stack[8]; // FP<n> Registers in each stack slot...
65 unsigned RegMap[8]; // Track which stack slot contains each register
66 unsigned StackTop; // The current top of the FP stack.
68 void dumpStack() const {
69 std::cerr << "Stack contents:";
70 for (unsigned i = 0; i != StackTop; ++i) {
71 std::cerr << " FP" << Stack[i];
72 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!");
77 // getSlot - Return the stack slot number a particular register number is
79 unsigned getSlot(unsigned RegNo) const {
80 assert(RegNo < 8 && "Regno out of range!");
84 // getStackEntry - Return the X86::FP<n> register in register ST(i)
85 unsigned getStackEntry(unsigned STi) const {
86 assert(STi < StackTop && "Access past stack top!");
87 return Stack[StackTop-1-STi];
90 // getSTReg - Return the X86::ST(i) register which contains the specified
92 unsigned getSTReg(unsigned RegNo) const {
93 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0;
96 // pushReg - Push the specified FP<n> register onto the stack
97 void pushReg(unsigned Reg) {
98 assert(Reg < 8 && "Register number out of range!");
99 assert(StackTop < 8 && "Stack overflow!");
100 Stack[StackTop] = Reg;
101 RegMap[Reg] = StackTop++;
104 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; }
105 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) {
106 if (!isAtTop(RegNo)) {
107 unsigned Slot = getSlot(RegNo);
108 unsigned STReg = getSTReg(RegNo);
109 unsigned RegOnTop = getStackEntry(0);
111 // Swap the slots the regs are in
112 std::swap(RegMap[RegNo], RegMap[RegOnTop]);
114 // Swap stack slot contents
115 assert(RegMap[RegOnTop] < StackTop);
116 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]);
118 // Emit an fxch to update the runtime processors version of the state
119 BuildMI(*MBB, I, X86::FXCH, 1).addReg(STReg);
124 void duplicateToTop(unsigned RegNo, unsigned AsReg, MachineInstr *I) {
125 unsigned STReg = getSTReg(RegNo);
126 pushReg(AsReg); // New register on top of stack
128 BuildMI(*MBB, I, X86::FLDrr, 1).addReg(STReg);
131 // popStackAfter - Pop the current value off of the top of the FP stack
132 // after the specified instruction.
133 void popStackAfter(MachineBasicBlock::iterator &I);
135 // freeStackSlotAfter - Free the specified register from the register stack,
136 // so that it is no longer in a register. If the register is currently at
137 // the top of the stack, we just pop the current instruction, otherwise we
138 // store the current top-of-stack into the specified slot, then pop the top
140 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg);
142 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
144 void handleZeroArgFP(MachineBasicBlock::iterator &I);
145 void handleOneArgFP(MachineBasicBlock::iterator &I);
146 void handleOneArgFPRW(MachineBasicBlock::iterator &I);
147 void handleTwoArgFP(MachineBasicBlock::iterator &I);
148 void handleCompareFP(MachineBasicBlock::iterator &I);
149 void handleCondMovFP(MachineBasicBlock::iterator &I);
150 void handleSpecialFP(MachineBasicBlock::iterator &I);
154 FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
156 /// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
157 /// register references into FP stack references.
159 bool FPS::runOnMachineFunction(MachineFunction &MF) {
160 LV = &getAnalysis<LiveVariables>();
163 // Process the function in depth first order so that we process at least one
164 // of the predecessors for every reachable block in the function.
165 std::set<MachineBasicBlock*> Processed;
166 MachineBasicBlock *Entry = MF.begin();
168 bool Changed = false;
169 for (df_ext_iterator<MachineBasicBlock*, std::set<MachineBasicBlock*> >
170 I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed);
172 Changed |= processBasicBlock(MF, **I);
177 /// processBasicBlock - Loop over all of the instructions in the basic block,
178 /// transforming FP instructions into their stack form.
180 bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
181 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
182 bool Changed = false;
185 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
186 MachineInstr *MI = I;
187 unsigned Flags = TII.get(MI->getOpcode()).TSFlags;
188 if ((Flags & X86II::FPTypeMask) == X86II::NotFP)
189 continue; // Efficiently ignore non-fp insts!
191 MachineInstr *PrevMI = 0;
195 ++NumFP; // Keep track of # of pseudo instrs
196 DEBUG(std::cerr << "\nFPInst:\t";
197 MI->print(std::cerr, MF.getTarget()));
199 // Get dead variables list now because the MI pointer may be deleted as part
201 LiveVariables::killed_iterator IB = LV->dead_begin(MI);
202 LiveVariables::killed_iterator IE = LV->dead_end(MI);
204 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo();
205 LiveVariables::killed_iterator I = LV->killed_begin(MI);
206 LiveVariables::killed_iterator E = LV->killed_end(MI);
208 std::cerr << "Killed Operands:";
210 std::cerr << " %" << MRI->getName(I->second);
214 switch (Flags & X86II::FPTypeMask) {
215 case X86II::ZeroArgFP: handleZeroArgFP(I); break;
216 case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0)
217 case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0))
218 case X86II::TwoArgFP: handleTwoArgFP(I); break;
219 case X86II::CompareFP: handleCompareFP(I); break;
220 case X86II::CondMovFP: handleCondMovFP(I); break;
221 case X86II::SpecialFP: handleSpecialFP(I); break;
222 default: assert(0 && "Unknown FP Type!");
225 // Check to see if any of the values defined by this instruction are dead
226 // after definition. If so, pop them.
227 for (; IB != IE; ++IB) {
228 unsigned Reg = IB->second;
229 if (Reg >= X86::FP0 && Reg <= X86::FP6) {
230 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
231 freeStackSlotAfter(I, Reg-X86::FP0);
235 // Print out all of the instructions expanded to if -debug
237 MachineBasicBlock::iterator PrevI(PrevMI);
239 std::cerr << "Just deleted pseudo instruction\n";
241 MachineBasicBlock::iterator Start = I;
242 // Rewind to first instruction newly inserted.
243 while (Start != BB.begin() && prior(Start) != PrevI) --Start;
244 std::cerr << "Inserted instructions:\n\t";
245 Start->print(std::cerr, MF.getTarget());
246 while (++Start != next(I));
254 assert(StackTop == 0 && "Stack not empty at end of basic block?");
258 //===----------------------------------------------------------------------===//
259 // Efficient Lookup Table Support
260 //===----------------------------------------------------------------------===//
266 bool operator<(const TableEntry &TE) const { return from < TE.from; }
267 bool operator<(unsigned V) const { return from < V; }
271 static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
272 for (unsigned i = 0; i != NumEntries-1; ++i)
273 if (!(Table[i] < Table[i+1])) return false;
277 static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) {
278 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode);
279 if (I != Table+N && I->from == Opcode)
284 #define ARRAY_SIZE(TABLE) \
285 (sizeof(TABLE)/sizeof(TABLE[0]))
288 #define ASSERT_SORTED(TABLE)
290 #define ASSERT_SORTED(TABLE) \
291 { static bool TABLE##Checked = false; \
292 if (!TABLE##Checked) \
293 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \
294 "All lookup tables must be sorted for efficient access!"); \
299 //===----------------------------------------------------------------------===//
301 //===----------------------------------------------------------------------===//
303 // PopTable - Sorted map of instructions to their popping version. The first
304 // element is an instruction, the second is the version which pops.
306 static const TableEntry PopTable[] = {
307 { X86::FADDrST0 , X86::FADDPrST0 },
309 { X86::FDIVRrST0, X86::FDIVRPrST0 },
310 { X86::FDIVrST0 , X86::FDIVPrST0 },
312 { X86::FIST16m , X86::FISTP16m },
313 { X86::FIST32m , X86::FISTP32m },
315 { X86::FMULrST0 , X86::FMULPrST0 },
317 { X86::FST32m , X86::FSTP32m },
318 { X86::FST64m , X86::FSTP64m },
319 { X86::FSTrr , X86::FSTPrr },
321 { X86::FSUBRrST0, X86::FSUBRPrST0 },
322 { X86::FSUBrST0 , X86::FSUBPrST0 },
324 { X86::FUCOMIr , X86::FUCOMIPr },
326 { X86::FUCOMPr , X86::FUCOMPPr },
327 { X86::FUCOMr , X86::FUCOMPr },
330 /// popStackAfter - Pop the current value off of the top of the FP stack after
331 /// the specified instruction. This attempts to be sneaky and combine the pop
332 /// into the instruction itself if possible. The iterator is left pointing to
333 /// the last instruction, be it a new pop instruction inserted, or the old
334 /// instruction if it was modified in place.
336 void FPS::popStackAfter(MachineBasicBlock::iterator &I) {
337 ASSERT_SORTED(PopTable);
338 assert(StackTop > 0 && "Cannot pop empty stack!");
339 RegMap[Stack[--StackTop]] = ~0; // Update state
341 // Check to see if there is a popping version of this instruction...
342 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode());
344 I->setOpcode(Opcode);
345 if (Opcode == X86::FUCOMPPr)
348 } else { // Insert an explicit pop
349 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(X86::ST0);
353 /// freeStackSlotAfter - Free the specified register from the register stack, so
354 /// that it is no longer in a register. If the register is currently at the top
355 /// of the stack, we just pop the current instruction, otherwise we store the
356 /// current top-of-stack into the specified slot, then pop the top of stack.
357 void FPS::freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned FPRegNo) {
358 if (getStackEntry(0) == FPRegNo) { // already at the top of stack? easy.
363 // Otherwise, store the top of stack into the dead slot, killing the operand
364 // without having to add in an explicit xchg then pop.
366 unsigned STReg = getSTReg(FPRegNo);
367 unsigned OldSlot = getSlot(FPRegNo);
368 unsigned TopReg = Stack[StackTop-1];
369 Stack[OldSlot] = TopReg;
370 RegMap[TopReg] = OldSlot;
371 RegMap[FPRegNo] = ~0;
372 Stack[--StackTop] = ~0;
373 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(STReg);
377 static unsigned getFPReg(const MachineOperand &MO) {
378 assert(MO.isRegister() && "Expected an FP register!");
379 unsigned Reg = MO.getReg();
380 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
381 return Reg - X86::FP0;
385 //===----------------------------------------------------------------------===//
386 // Instruction transformation implementation
387 //===----------------------------------------------------------------------===//
389 /// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem>
391 void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) {
392 MachineInstr *MI = I;
393 unsigned DestReg = getFPReg(MI->getOperand(0));
394 MI->RemoveOperand(0); // Remove the explicit ST(0) operand
396 // Result gets pushed on the stack...
400 /// handleOneArgFP - fst <mem>, ST(0)
402 void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
403 MachineInstr *MI = I;
404 assert((MI->getNumOperands() == 5 || MI->getNumOperands() == 1) &&
405 "Can only handle fst* & ftst instructions!");
407 // Is this the last use of the source register?
408 unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1));
409 bool KillsSrc = false;
410 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
411 E = LV->killed_end(MI); KI != E; ++KI)
412 KillsSrc |= KI->second == X86::FP0+Reg;
414 // FSTP80r and FISTP64r are strange because there are no non-popping versions.
415 // If we have one _and_ we don't want to pop the operand, duplicate the value
416 // on the stack instead of moving it. This ensure that popping the value is
419 if ((MI->getOpcode() == X86::FSTP80m ||
420 MI->getOpcode() == X86::FISTP64m) && !KillsSrc) {
421 duplicateToTop(Reg, 7 /*temp register*/, I);
423 moveToTop(Reg, I); // Move to the top of the stack...
425 MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand
427 if (MI->getOpcode() == X86::FSTP80m || MI->getOpcode() == X86::FISTP64m) {
428 assert(StackTop > 0 && "Stack empty??");
430 } else if (KillsSrc) { // Last use of operand?
436 /// handleOneArgFPRW: Handle instructions that read from the top of stack and
437 /// replace the value with a newly computed value. These instructions may have
438 /// non-fp operands after their FP operands.
442 /// R1 = fadd R2, [mem]
444 void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
445 MachineInstr *MI = I;
446 assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!");
448 // Is this the last use of the source register?
449 unsigned Reg = getFPReg(MI->getOperand(1));
450 bool KillsSrc = false;
451 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
452 E = LV->killed_end(MI); KI != E; ++KI)
453 KillsSrc |= KI->second == X86::FP0+Reg;
456 // If this is the last use of the source register, just make sure it's on
457 // the top of the stack.
459 assert(StackTop > 0 && "Stack cannot be empty!");
461 pushReg(getFPReg(MI->getOperand(0)));
463 // If this is not the last use of the source register, _copy_ it to the top
465 duplicateToTop(Reg, getFPReg(MI->getOperand(0)), I);
468 MI->RemoveOperand(1); // Drop the source operand.
469 MI->RemoveOperand(0); // Drop the destination operand.
473 //===----------------------------------------------------------------------===//
474 // Define tables of various ways to map pseudo instructions
477 // ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
478 static const TableEntry ForwardST0Table[] = {
479 { X86::FpADD , X86::FADDST0r },
480 { X86::FpDIV , X86::FDIVST0r },
481 { X86::FpMUL , X86::FMULST0r },
482 { X86::FpSUB , X86::FSUBST0r },
485 // ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
486 static const TableEntry ReverseST0Table[] = {
487 { X86::FpADD , X86::FADDST0r }, // commutative
488 { X86::FpDIV , X86::FDIVRST0r },
489 { X86::FpMUL , X86::FMULST0r }, // commutative
490 { X86::FpSUB , X86::FSUBRST0r },
493 // ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
494 static const TableEntry ForwardSTiTable[] = {
495 { X86::FpADD , X86::FADDrST0 }, // commutative
496 { X86::FpDIV , X86::FDIVRrST0 },
497 { X86::FpMUL , X86::FMULrST0 }, // commutative
498 { X86::FpSUB , X86::FSUBRrST0 },
501 // ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
502 static const TableEntry ReverseSTiTable[] = {
503 { X86::FpADD , X86::FADDrST0 },
504 { X86::FpDIV , X86::FDIVrST0 },
505 { X86::FpMUL , X86::FMULrST0 },
506 { X86::FpSUB , X86::FSUBrST0 },
510 /// handleTwoArgFP - Handle instructions like FADD and friends which are virtual
511 /// instructions which need to be simplified and possibly transformed.
513 /// Result: ST(0) = fsub ST(0), ST(i)
514 /// ST(i) = fsub ST(0), ST(i)
515 /// ST(0) = fsubr ST(0), ST(i)
516 /// ST(i) = fsubr ST(0), ST(i)
518 void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
519 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
520 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable);
521 MachineInstr *MI = I;
523 unsigned NumOperands = MI->getNumOperands();
524 assert(NumOperands == 3 && "Illegal TwoArgFP instruction!");
525 unsigned Dest = getFPReg(MI->getOperand(0));
526 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
527 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
528 bool KillsOp0 = false, KillsOp1 = false;
530 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
531 E = LV->killed_end(MI); KI != E; ++KI) {
532 KillsOp0 |= (KI->second == X86::FP0+Op0);
533 KillsOp1 |= (KI->second == X86::FP0+Op1);
536 unsigned TOS = getStackEntry(0);
538 // One of our operands must be on the top of the stack. If neither is yet, we
540 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
541 // We can choose to move either operand to the top of the stack. If one of
542 // the operands is killed by this instruction, we want that one so that we
543 // can update right on top of the old version.
545 moveToTop(Op0, I); // Move dead operand to TOS.
547 } else if (KillsOp1) {
551 // All of the operands are live after this instruction executes, so we
552 // cannot update on top of any operand. Because of this, we must
553 // duplicate one of the stack elements to the top. It doesn't matter
554 // which one we pick.
556 duplicateToTop(Op0, Dest, I);
560 } else if (!KillsOp0 && !KillsOp1) {
561 // If we DO have one of our operands at the top of the stack, but we don't
562 // have a dead operand, we must duplicate one of the operands to a new slot
564 duplicateToTop(Op0, Dest, I);
569 // Now we know that one of our operands is on the top of the stack, and at
570 // least one of our operands is killed by this instruction.
571 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) &&
572 "Stack conditions not set up right!");
574 // We decide which form to use based on what is on the top of the stack, and
575 // which operand is killed by this instruction.
576 const TableEntry *InstTable;
577 bool isForward = TOS == Op0;
578 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
581 InstTable = ForwardST0Table;
583 InstTable = ReverseST0Table;
586 InstTable = ForwardSTiTable;
588 InstTable = ReverseSTiTable;
591 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode());
592 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!");
594 // NotTOS - The register which is not on the top of stack...
595 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
597 // Replace the old instruction with a new instruction
599 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(NotTOS));
601 // If both operands are killed, pop one off of the stack in addition to
602 // overwriting the other one.
603 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
604 assert(!updateST0 && "Should have updated other operand!");
605 popStackAfter(I); // Pop the top of stack
608 // Update stack information so that we know the destination register is now on
610 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS);
611 assert(UpdatedSlot < StackTop && Dest < 7);
612 Stack[UpdatedSlot] = Dest;
613 RegMap[Dest] = UpdatedSlot;
614 delete MI; // Remove the old instruction
617 /// handleCompareFP - Handle FpUCOM and FpUCOMI instructions, which have two FP
618 /// register arguments and no explicit destinations.
620 void FPS::handleCompareFP(MachineBasicBlock::iterator &I) {
621 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
622 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable);
623 MachineInstr *MI = I;
625 unsigned NumOperands = MI->getNumOperands();
626 assert(NumOperands == 2 && "Illegal FpUCOM* instruction!");
627 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
628 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
629 bool KillsOp0 = false, KillsOp1 = false;
631 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
632 E = LV->killed_end(MI); KI != E; ++KI) {
633 KillsOp0 |= (KI->second == X86::FP0+Op0);
634 KillsOp1 |= (KI->second == X86::FP0+Op1);
637 // Make sure the first operand is on the top of stack, the other one can be
641 // Replace the old instruction with a new instruction
643 unsigned Opcode = MI->getOpcode() == X86::FpUCOM ? X86::FUCOMr : X86::FUCOMIr;
644 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(Op1));
646 // If any of the operands are killed by this instruction, free them.
647 if (KillsOp0) freeStackSlotAfter(I, Op0);
648 if (KillsOp1 && Op0 != Op1) freeStackSlotAfter(I, Op1);
649 delete MI; // Remove the old instruction
652 /// handleCondMovFP - Handle two address conditional move instructions. These
653 /// instructions move a st(i) register to st(0) iff a condition is true. These
654 /// instructions require that the first operand is at the top of the stack, but
655 /// otherwise don't modify the stack at all.
656 void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) {
657 MachineInstr *MI = I;
659 unsigned Op0 = getFPReg(MI->getOperand(0));
660 unsigned Op1 = getFPReg(MI->getOperand(1));
662 // The first operand *must* be on the top of the stack.
665 // Change the second operand to the stack register that the operand is in.
666 MI->RemoveOperand(0);
667 MI->getOperand(0).setReg(getSTReg(Op1));
669 // If we kill the second operand, make sure to pop it from the stack.
671 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
672 E = LV->killed_end(MI); KI != E; ++KI)
673 if (KI->second == X86::FP0+Op1) {
674 // Get this value off of the register stack.
675 freeStackSlotAfter(I, Op1);
681 /// handleSpecialFP - Handle special instructions which behave unlike other
682 /// floating point instructions. This is primarily intended for use by pseudo
685 void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
686 MachineInstr *MI = I;
687 switch (MI->getOpcode()) {
688 default: assert(0 && "Unknown SpecialFP instruction!");
689 case X86::FpGETRESULT: // Appears immediately after a call returning FP type!
690 assert(StackTop == 0 && "Stack should be empty after a call!");
691 pushReg(getFPReg(MI->getOperand(0)));
693 case X86::FpSETRESULT:
694 assert(StackTop == 1 && "Stack should have one element on it to return!");
695 --StackTop; // "Forget" we have something on the top of stack!
698 unsigned SrcReg = getFPReg(MI->getOperand(1));
699 unsigned DestReg = getFPReg(MI->getOperand(0));
700 bool KillsSrc = false;
701 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
702 E = LV->killed_end(MI); KI != E; ++KI)
703 KillsSrc |= KI->second == X86::FP0+SrcReg;
706 // If the input operand is killed, we can just change the owner of the
707 // incoming stack slot into the result.
708 unsigned Slot = getSlot(SrcReg);
709 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!");
710 Stack[Slot] = DestReg;
711 RegMap[DestReg] = Slot;
714 // For FMOV we just duplicate the specified value to a new stack slot.
715 // This could be made better, but would require substantial changes.
716 duplicateToTop(SrcReg, DestReg, I);
722 I = MBB->erase(I); // Remove the pseudo instruction