1 //=======- X86FrameLowering.cpp - X86 Frame Information --------*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86TargetMachine.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/MC/MCAsmInfo.h"
26 #include "llvm/Target/TargetData.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/ADT/SmallSet.h"
33 // FIXME: completely move here.
34 extern cl::opt<bool> ForceStackAlign;
36 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
37 return !MF.getFrameInfo()->hasVarSizedObjects();
40 /// hasFP - Return true if the specified function should have a dedicated frame
41 /// pointer register. This is true if the function has variable sized allocas
42 /// or if frame pointer elimination is disabled.
43 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
44 const MachineFrameInfo *MFI = MF.getFrameInfo();
45 const MachineModuleInfo &MMI = MF.getMMI();
46 const TargetRegisterInfo *RI = TM.getRegisterInfo();
48 return (DisableFramePointerElim(MF) ||
49 RI->needsStackRealignment(MF) ||
50 MFI->hasVarSizedObjects() ||
51 MFI->isFrameAddressTaken() ||
52 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
53 MMI.callsUnwindInit());
56 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) {
60 return X86::SUB64ri32;
68 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) {
72 return X86::ADD64ri32;
80 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
81 /// when it reaches the "return" instruction. We can then pop a stack object
82 /// to this register without worry about clobbering it.
83 static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB,
84 MachineBasicBlock::iterator &MBBI,
85 const TargetRegisterInfo &TRI,
87 const MachineFunction *MF = MBB.getParent();
88 const Function *F = MF->getFunction();
89 if (!F || MF->getMMI().callsEHReturn())
92 static const unsigned CallerSavedRegs32Bit[] = {
93 X86::EAX, X86::EDX, X86::ECX
96 static const unsigned CallerSavedRegs64Bit[] = {
97 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI,
98 X86::R8, X86::R9, X86::R10, X86::R11
101 unsigned Opc = MBBI->getOpcode();
106 case X86::TCRETURNdi:
107 case X86::TCRETURNri:
108 case X86::TCRETURNmi:
109 case X86::TCRETURNdi64:
110 case X86::TCRETURNri64:
111 case X86::TCRETURNmi64:
113 case X86::EH_RETURN64: {
114 SmallSet<unsigned, 8> Uses;
115 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
116 MachineOperand &MO = MBBI->getOperand(i);
117 if (!MO.isReg() || MO.isDef())
119 unsigned Reg = MO.getReg();
122 for (const unsigned *AsI = TRI.getOverlaps(Reg); *AsI; ++AsI)
126 const unsigned *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit;
128 if (!Uses.count(*CS))
137 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
138 /// stack pointer by a constant value.
140 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
141 unsigned StackPtr, int64_t NumBytes,
142 bool Is64Bit, const TargetInstrInfo &TII,
143 const TargetRegisterInfo &TRI) {
144 bool isSub = NumBytes < 0;
145 uint64_t Offset = isSub ? -NumBytes : NumBytes;
146 unsigned Opc = isSub ?
147 getSUBriOpcode(Is64Bit, Offset) :
148 getADDriOpcode(Is64Bit, Offset);
149 uint64_t Chunk = (1LL << 31) - 1;
150 DebugLoc DL = MBB.findDebugLoc(MBBI);
153 uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
154 if (ThisVal == (Is64Bit ? 8 : 4)) {
155 // Use push / pop instead.
157 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
158 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
161 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
162 : (Is64Bit ? X86::POP64r : X86::POP32r);
163 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
164 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
166 MI->setFlag(MachineInstr::FrameSetup);
173 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
177 MI->setFlag(MachineInstr::FrameSetup);
178 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
183 /// mergeSPUpdatesUp - Merge two stack-manipulating instructions upper iterator.
185 void mergeSPUpdatesUp(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
186 unsigned StackPtr, uint64_t *NumBytes = NULL) {
187 if (MBBI == MBB.begin()) return;
189 MachineBasicBlock::iterator PI = prior(MBBI);
190 unsigned Opc = PI->getOpcode();
191 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
192 Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
193 PI->getOperand(0).getReg() == StackPtr) {
195 *NumBytes += PI->getOperand(2).getImm();
197 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
198 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
199 PI->getOperand(0).getReg() == StackPtr) {
201 *NumBytes -= PI->getOperand(2).getImm();
206 /// mergeSPUpdatesDown - Merge two stack-manipulating instructions lower iterator.
208 void mergeSPUpdatesDown(MachineBasicBlock &MBB,
209 MachineBasicBlock::iterator &MBBI,
210 unsigned StackPtr, uint64_t *NumBytes = NULL) {
211 // FIXME: THIS ISN'T RUN!!!
214 if (MBBI == MBB.end()) return;
216 MachineBasicBlock::iterator NI = llvm::next(MBBI);
217 if (NI == MBB.end()) return;
219 unsigned Opc = NI->getOpcode();
220 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
221 Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
222 NI->getOperand(0).getReg() == StackPtr) {
224 *NumBytes -= NI->getOperand(2).getImm();
227 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
228 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
229 NI->getOperand(0).getReg() == StackPtr) {
231 *NumBytes += NI->getOperand(2).getImm();
237 /// mergeSPUpdates - Checks the instruction before/after the passed
238 /// instruction. If it is an ADD/SUB instruction it is deleted argument and the
239 /// stack adjustment is returned as a positive value for ADD and a negative for
241 static int mergeSPUpdates(MachineBasicBlock &MBB,
242 MachineBasicBlock::iterator &MBBI,
244 bool doMergeWithPrevious) {
245 if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
246 (!doMergeWithPrevious && MBBI == MBB.end()))
249 MachineBasicBlock::iterator PI = doMergeWithPrevious ? prior(MBBI) : MBBI;
250 MachineBasicBlock::iterator NI = doMergeWithPrevious ? 0 : llvm::next(MBBI);
251 unsigned Opc = PI->getOpcode();
254 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
255 Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
256 PI->getOperand(0).getReg() == StackPtr){
257 Offset += PI->getOperand(2).getImm();
259 if (!doMergeWithPrevious) MBBI = NI;
260 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
261 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
262 PI->getOperand(0).getReg() == StackPtr) {
263 Offset -= PI->getOperand(2).getImm();
265 if (!doMergeWithPrevious) MBBI = NI;
271 static bool isEAXLiveIn(MachineFunction &MF) {
272 for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(),
273 EE = MF.getRegInfo().livein_end(); II != EE; ++II) {
274 unsigned Reg = II->first;
276 if (Reg == X86::EAX || Reg == X86::AX ||
277 Reg == X86::AH || Reg == X86::AL)
284 void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF,
286 unsigned FramePtr) const {
287 MachineFrameInfo *MFI = MF.getFrameInfo();
288 MachineModuleInfo &MMI = MF.getMMI();
290 // Add callee saved registers to move list.
291 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
292 if (CSI.empty()) return;
294 std::vector<MachineMove> &Moves = MMI.getFrameMoves();
295 const TargetData *TD = TM.getTargetData();
296 bool HasFP = hasFP(MF);
298 // Calculate amount of bytes used for return address storing.
299 int stackGrowth = -TD->getPointerSize();
301 // FIXME: This is dirty hack. The code itself is pretty mess right now.
302 // It should be rewritten from scratch and generalized sometimes.
304 // Determine maximum offset (minimum due to stack growth).
305 int64_t MaxOffset = 0;
306 for (std::vector<CalleeSavedInfo>::const_iterator
307 I = CSI.begin(), E = CSI.end(); I != E; ++I)
308 MaxOffset = std::min(MaxOffset,
309 MFI->getObjectOffset(I->getFrameIdx()));
311 // Calculate offsets.
312 int64_t saveAreaOffset = (HasFP ? 3 : 2) * stackGrowth;
313 for (std::vector<CalleeSavedInfo>::const_iterator
314 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
315 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
316 unsigned Reg = I->getReg();
317 Offset = MaxOffset - Offset + saveAreaOffset;
319 // Don't output a new machine move if we're re-saving the frame
320 // pointer. This happens when the PrologEpilogInserter has inserted an extra
321 // "PUSH" of the frame pointer -- the "emitPrologue" method automatically
322 // generates one when frame pointers are used. If we generate a "machine
323 // move" for this extra "PUSH", the linker will lose track of the fact that
324 // the frame pointer should have the value of the first "PUSH" when it's
327 // FIXME: This looks inelegant. It's possibly correct, but it's covering up
328 // another bug. I.e., one where we generate a prolog like this:
336 // The immediate re-push of EBP is unnecessary. At the least, it's an
337 // optimization bug. EBP can be used as a scratch register in certain
338 // cases, but probably not when we have a frame pointer.
339 if (HasFP && FramePtr == Reg)
342 MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
343 MachineLocation CSSrc(Reg);
344 Moves.push_back(MachineMove(Label, CSDst, CSSrc));
348 /// emitPrologue - Push callee-saved registers onto the stack, which
349 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
350 /// space for local variables. Also emit labels used by the exception handler to
351 /// generate the exception handling frames.
352 void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
353 MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
354 MachineBasicBlock::iterator MBBI = MBB.begin();
355 MachineFrameInfo *MFI = MF.getFrameInfo();
356 const Function *Fn = MF.getFunction();
357 const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
358 const X86InstrInfo &TII = *TM.getInstrInfo();
359 MachineModuleInfo &MMI = MF.getMMI();
360 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
361 bool needsFrameMoves = MMI.hasDebugInfo() ||
362 Fn->needsUnwindTableEntry();
363 uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment.
364 uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate.
365 bool HasFP = hasFP(MF);
366 bool Is64Bit = STI.is64Bit();
367 bool IsWin64 = STI.isTargetWin64();
368 unsigned StackAlign = getStackAlignment();
369 unsigned SlotSize = RegInfo->getSlotSize();
370 unsigned FramePtr = RegInfo->getFrameRegister(MF);
371 unsigned StackPtr = RegInfo->getStackRegister();
375 // If we're forcing a stack realignment we can't rely on just the frame
376 // info, we need to know the ABI stack alignment as well in case we
377 // have a call out. Otherwise just make sure we have some alignment - we'll
378 // go with the minimum SlotSize.
379 if (ForceStackAlign) {
381 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
382 else if (MaxAlign < SlotSize)
386 // Add RETADDR move area to callee saved frame size.
387 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
388 if (TailCallReturnAddrDelta < 0)
389 X86FI->setCalleeSavedFrameSize(
390 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
392 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
393 // function, and use up to 128 bytes of stack space, don't have a frame
394 // pointer, calls, or dynamic alloca then we do not need to adjust the
395 // stack pointer (we fit in the Red Zone).
396 if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) &&
397 !RegInfo->needsStackRealignment(MF) &&
398 !MFI->hasVarSizedObjects() && // No dynamic alloca.
399 !MFI->adjustsStack() && // No calls.
400 !IsWin64) { // Win64 has no Red Zone
401 uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
402 if (HasFP) MinSize += SlotSize;
403 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
404 MFI->setStackSize(StackSize);
407 // Insert stack pointer adjustment for later moving of return addr. Only
408 // applies to tail call optimized functions where the callee argument stack
409 // size is bigger than the callers.
410 if (TailCallReturnAddrDelta < 0) {
412 BuildMI(MBB, MBBI, DL,
413 TII.get(getSUBriOpcode(Is64Bit, -TailCallReturnAddrDelta)),
416 .addImm(-TailCallReturnAddrDelta)
417 .setMIFlag(MachineInstr::FrameSetup);
418 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
421 // Mapping for machine moves:
423 // DST: VirtualFP AND
424 // SRC: VirtualFP => DW_CFA_def_cfa_offset
425 // ELSE => DW_CFA_def_cfa
427 // SRC: VirtualFP AND
428 // DST: Register => DW_CFA_def_cfa_register
431 // OFFSET < 0 => DW_CFA_offset_extended_sf
432 // REG < 64 => DW_CFA_offset + Reg
433 // ELSE => DW_CFA_offset_extended
435 std::vector<MachineMove> &Moves = MMI.getFrameMoves();
436 const TargetData *TD = MF.getTarget().getTargetData();
437 uint64_t NumBytes = 0;
438 int stackGrowth = -TD->getPointerSize();
441 // Calculate required stack adjustment.
442 uint64_t FrameSize = StackSize - SlotSize;
443 if (RegInfo->needsStackRealignment(MF))
444 FrameSize = (FrameSize + MaxAlign - 1) / MaxAlign * MaxAlign;
446 NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
448 // Get the offset of the stack slot for the EBP register, which is
449 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
450 // Update the frame offset adjustment.
451 MFI->setOffsetAdjustment(-NumBytes);
453 // Save EBP/RBP into the appropriate stack slot.
454 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
455 .addReg(FramePtr, RegState::Kill)
456 .setMIFlag(MachineInstr::FrameSetup);
458 if (needsFrameMoves) {
459 // Mark the place where EBP/RBP was saved.
460 MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
461 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(FrameLabel);
463 // Define the current CFA rule to use the provided offset.
465 MachineLocation SPDst(MachineLocation::VirtualFP);
466 MachineLocation SPSrc(MachineLocation::VirtualFP, 2 * stackGrowth);
467 Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
469 MachineLocation SPDst(StackPtr);
470 MachineLocation SPSrc(StackPtr, stackGrowth);
471 Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
474 // Change the rule for the FramePtr to be an "offset" rule.
475 MachineLocation FPDst(MachineLocation::VirtualFP, 2 * stackGrowth);
476 MachineLocation FPSrc(FramePtr);
477 Moves.push_back(MachineMove(FrameLabel, FPDst, FPSrc));
480 // Update EBP with the new base value...
481 BuildMI(MBB, MBBI, DL,
482 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
484 .setMIFlag(MachineInstr::FrameSetup);
486 if (needsFrameMoves) {
487 // Mark effective beginning of when frame pointer becomes valid.
488 MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
489 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(FrameLabel);
491 // Define the current CFA to use the EBP/RBP register.
492 MachineLocation FPDst(FramePtr);
493 MachineLocation FPSrc(MachineLocation::VirtualFP);
494 Moves.push_back(MachineMove(FrameLabel, FPDst, FPSrc));
497 // Mark the FramePtr as live-in in every block except the entry.
498 for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
500 I->addLiveIn(FramePtr);
503 if (RegInfo->needsStackRealignment(MF)) {
505 BuildMI(MBB, MBBI, DL,
506 TII.get(Is64Bit ? X86::AND64ri32 : X86::AND32ri),
507 StackPtr).addReg(StackPtr).addImm(-MaxAlign);
509 // The EFLAGS implicit def is dead.
510 MI->getOperand(3).setIsDead();
513 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
516 // Skip the callee-saved push instructions.
517 bool PushedRegs = false;
518 int StackOffset = 2 * stackGrowth;
520 while (MBBI != MBB.end() &&
521 (MBBI->getOpcode() == X86::PUSH32r ||
522 MBBI->getOpcode() == X86::PUSH64r)) {
526 if (!HasFP && needsFrameMoves) {
527 // Mark callee-saved push instruction.
528 MCSymbol *Label = MMI.getContext().CreateTempSymbol();
529 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label);
531 // Define the current CFA rule to use the provided offset.
532 unsigned Ptr = StackSize ?
533 MachineLocation::VirtualFP : StackPtr;
534 MachineLocation SPDst(Ptr);
535 MachineLocation SPSrc(Ptr, StackOffset);
536 Moves.push_back(MachineMove(Label, SPDst, SPSrc));
537 StackOffset += stackGrowth;
541 DL = MBB.findDebugLoc(MBBI);
543 // If there is an SUB32ri of ESP immediately before this instruction, merge
544 // the two. This can be the case when tail call elimination is enabled and
545 // the callee has more arguments then the caller.
546 NumBytes -= mergeSPUpdates(MBB, MBBI, StackPtr, true);
548 // If there is an ADD32ri or SUB32ri of ESP immediately after this
549 // instruction, merge the two instructions.
550 mergeSPUpdatesDown(MBB, MBBI, StackPtr, &NumBytes);
552 // Adjust stack pointer: ESP -= numbytes.
554 // Windows and cygwin/mingw require a prologue helper routine when allocating
555 // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
556 // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
557 // stack and adjust the stack pointer in one go. The 64-bit version of
558 // __chkstk is only responsible for probing the stack. The 64-bit prologue is
559 // responsible for adjusting the stack pointer. Touching the stack at 4K
560 // increments is necessary to ensure that the guard pages used by the OS
561 // virtual memory manager are allocated in correct sequence.
562 if (NumBytes >= 4096 && STI.isTargetCOFF() && !STI.isTargetEnvMacho()) {
563 const char *StackProbeSymbol;
564 bool isSPUpdateNeeded = false;
567 if (STI.isTargetCygMing())
568 StackProbeSymbol = "___chkstk";
570 StackProbeSymbol = "__chkstk";
571 isSPUpdateNeeded = true;
573 } else if (STI.isTargetCygMing())
574 StackProbeSymbol = "_alloca";
576 StackProbeSymbol = "_chkstk";
578 // Check whether EAX is livein for this function.
579 bool isEAXAlive = isEAXLiveIn(MF);
582 // Sanity check that EAX is not livein for this function.
583 // It should not be, so throw an assert.
584 assert(!Is64Bit && "EAX is livein in x64 case!");
587 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
588 .addReg(X86::EAX, RegState::Kill);
592 // Handle the 64-bit Windows ABI case where we need to call __chkstk.
593 // Function prologue is responsible for adjusting the stack pointer.
594 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
597 // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
598 // We'll also use 4 already allocated bytes for EAX.
599 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
600 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes);
603 BuildMI(MBB, MBBI, DL,
604 TII.get(Is64Bit ? X86::W64ALLOCA : X86::CALLpcrel32))
605 .addExternalSymbol(StackProbeSymbol)
606 .addReg(StackPtr, RegState::Define | RegState::Implicit)
607 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
609 // MSVC x64's __chkstk needs to adjust %rsp.
610 // FIXME: %rax preserves the offset and should be available.
611 if (isSPUpdateNeeded)
612 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
617 MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm),
619 StackPtr, false, NumBytes - 4);
620 MBB.insert(MBBI, MI);
623 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
626 if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {
627 // Mark end of stack pointer adjustment.
628 MCSymbol *Label = MMI.getContext().CreateTempSymbol();
629 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label);
631 if (!HasFP && NumBytes) {
632 // Define the current CFA rule to use the provided offset.
634 MachineLocation SPDst(MachineLocation::VirtualFP);
635 MachineLocation SPSrc(MachineLocation::VirtualFP,
636 -StackSize + stackGrowth);
637 Moves.push_back(MachineMove(Label, SPDst, SPSrc));
639 MachineLocation SPDst(StackPtr);
640 MachineLocation SPSrc(StackPtr, stackGrowth);
641 Moves.push_back(MachineMove(Label, SPDst, SPSrc));
645 // Emit DWARF info specifying the offsets of the callee-saved registers.
647 emitCalleeSavedFrameMoves(MF, Label, HasFP ? FramePtr : StackPtr);
651 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
652 MachineBasicBlock &MBB) const {
653 const MachineFrameInfo *MFI = MF.getFrameInfo();
654 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
655 const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
656 const X86InstrInfo &TII = *TM.getInstrInfo();
657 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
658 assert(MBBI != MBB.end() && "Returning block has no instructions");
659 unsigned RetOpcode = MBBI->getOpcode();
660 DebugLoc DL = MBBI->getDebugLoc();
661 bool Is64Bit = STI.is64Bit();
662 unsigned StackAlign = getStackAlignment();
663 unsigned SlotSize = RegInfo->getSlotSize();
664 unsigned FramePtr = RegInfo->getFrameRegister(MF);
665 unsigned StackPtr = RegInfo->getStackRegister();
669 llvm_unreachable("Can only insert epilog into returning blocks");
672 case X86::TCRETURNdi:
673 case X86::TCRETURNri:
674 case X86::TCRETURNmi:
675 case X86::TCRETURNdi64:
676 case X86::TCRETURNri64:
677 case X86::TCRETURNmi64:
679 case X86::EH_RETURN64:
680 break; // These are ok
683 // Get the number of bytes to allocate from the FrameInfo.
684 uint64_t StackSize = MFI->getStackSize();
685 uint64_t MaxAlign = MFI->getMaxAlignment();
686 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
687 uint64_t NumBytes = 0;
689 // If we're forcing a stack realignment we can't rely on just the frame
690 // info, we need to know the ABI stack alignment as well in case we
691 // have a call out. Otherwise just make sure we have some alignment - we'll
692 // go with the minimum.
693 if (ForceStackAlign) {
695 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
697 MaxAlign = MaxAlign ? MaxAlign : 4;
701 // Calculate required stack adjustment.
702 uint64_t FrameSize = StackSize - SlotSize;
703 if (RegInfo->needsStackRealignment(MF))
704 FrameSize = (FrameSize + MaxAlign - 1)/MaxAlign*MaxAlign;
706 NumBytes = FrameSize - CSSize;
709 BuildMI(MBB, MBBI, DL,
710 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), FramePtr);
712 NumBytes = StackSize - CSSize;
715 // Skip the callee-saved pop instructions.
716 MachineBasicBlock::iterator LastCSPop = MBBI;
717 while (MBBI != MBB.begin()) {
718 MachineBasicBlock::iterator PI = prior(MBBI);
719 unsigned Opc = PI->getOpcode();
721 if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE &&
722 !PI->getDesc().isTerminator())
728 DL = MBBI->getDebugLoc();
730 // If there is an ADD32ri or SUB32ri of ESP immediately before this
731 // instruction, merge the two instructions.
732 if (NumBytes || MFI->hasVarSizedObjects())
733 mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
735 // If dynamic alloca is used, then reset esp to point to the last callee-saved
736 // slot before popping them off! Same applies for the case, when stack was
738 if (RegInfo->needsStackRealignment(MF)) {
739 // We cannot use LEA here, because stack pointer was realigned. We need to
740 // deallocate local frame back.
742 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, TII, *RegInfo);
743 MBBI = prior(LastCSPop);
746 BuildMI(MBB, MBBI, DL,
747 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
748 StackPtr).addReg(FramePtr);
749 } else if (MFI->hasVarSizedObjects()) {
751 unsigned Opc = Is64Bit ? X86::LEA64r : X86::LEA32r;
753 addRegOffset(BuildMI(MF, DL, TII.get(Opc), StackPtr),
754 FramePtr, false, -CSSize);
755 MBB.insert(MBBI, MI);
757 BuildMI(MBB, MBBI, DL,
758 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), StackPtr)
761 } else if (NumBytes) {
762 // Adjust stack pointer back: ESP += numbytes.
763 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, TII, *RegInfo);
766 // We're returning from function via eh_return.
767 if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
768 MBBI = MBB.getLastNonDebugInstr();
769 MachineOperand &DestAddr = MBBI->getOperand(0);
770 assert(DestAddr.isReg() && "Offset should be in register!");
771 BuildMI(MBB, MBBI, DL,
772 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
773 StackPtr).addReg(DestAddr.getReg());
774 } else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||
775 RetOpcode == X86::TCRETURNmi ||
776 RetOpcode == X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64 ||
777 RetOpcode == X86::TCRETURNmi64) {
778 bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64;
779 // Tail call return: adjust the stack pointer and jump to callee.
780 MBBI = MBB.getLastNonDebugInstr();
781 MachineOperand &JumpTarget = MBBI->getOperand(0);
782 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
783 assert(StackAdjust.isImm() && "Expecting immediate value.");
785 // Adjust stack pointer.
786 int StackAdj = StackAdjust.getImm();
787 int MaxTCDelta = X86FI->getTCReturnAddrDelta();
789 assert(MaxTCDelta <= 0 && "MaxTCDelta should never be positive");
791 // Incoporate the retaddr area.
792 Offset = StackAdj-MaxTCDelta;
793 assert(Offset >= 0 && "Offset should never be negative");
796 // Check for possible merge with preceding ADD instruction.
797 Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true);
798 emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, TII, *RegInfo);
801 // Jump to label or value in register.
802 if (RetOpcode == X86::TCRETURNdi || RetOpcode == X86::TCRETURNdi64) {
803 MachineInstrBuilder MIB =
804 BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNdi)
805 ? X86::TAILJMPd : X86::TAILJMPd64));
806 if (JumpTarget.isGlobal())
807 MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
808 JumpTarget.getTargetFlags());
810 assert(JumpTarget.isSymbol());
811 MIB.addExternalSymbol(JumpTarget.getSymbolName(),
812 JumpTarget.getTargetFlags());
814 } else if (RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64) {
815 MachineInstrBuilder MIB =
816 BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNmi)
817 ? X86::TAILJMPm : X86::TAILJMPm64));
818 for (unsigned i = 0; i != 5; ++i)
819 MIB.addOperand(MBBI->getOperand(i));
820 } else if (RetOpcode == X86::TCRETURNri64) {
821 BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr64)).
822 addReg(JumpTarget.getReg(), RegState::Kill);
824 BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr)).
825 addReg(JumpTarget.getReg(), RegState::Kill);
828 MachineInstr *NewMI = prior(MBBI);
829 for (unsigned i = 2, e = MBBI->getNumOperands(); i != e; ++i)
830 NewMI->addOperand(MBBI->getOperand(i));
832 // Delete the pseudo instruction TCRETURN.
834 } else if ((RetOpcode == X86::RET || RetOpcode == X86::RETI) &&
835 (X86FI->getTCReturnAddrDelta() < 0)) {
836 // Add the return addr area delta back since we are not tail calling.
837 int delta = -1*X86FI->getTCReturnAddrDelta();
838 MBBI = MBB.getLastNonDebugInstr();
840 // Check for possible merge with preceding ADD instruction.
841 delta += mergeSPUpdates(MBB, MBBI, StackPtr, true);
842 emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, TII, *RegInfo);
847 X86FrameLowering::getInitialFrameState(std::vector<MachineMove> &Moves) const {
848 // Calculate amount of bytes used for return address storing
849 int stackGrowth = (STI.is64Bit() ? -8 : -4);
850 const X86RegisterInfo *RI = TM.getRegisterInfo();
852 // Initial state of the frame pointer is esp+stackGrowth.
853 MachineLocation Dst(MachineLocation::VirtualFP);
854 MachineLocation Src(RI->getStackRegister(), stackGrowth);
855 Moves.push_back(MachineMove(0, Dst, Src));
857 // Add return address to move list
858 MachineLocation CSDst(RI->getStackRegister(), stackGrowth);
859 MachineLocation CSSrc(RI->getRARegister());
860 Moves.push_back(MachineMove(0, CSDst, CSSrc));
863 int X86FrameLowering::getFrameIndexOffset(const MachineFunction &MF, int FI) const {
864 const X86RegisterInfo *RI =
865 static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
866 const MachineFrameInfo *MFI = MF.getFrameInfo();
867 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();
868 uint64_t StackSize = MFI->getStackSize();
870 if (RI->needsStackRealignment(MF)) {
872 // Skip the saved EBP.
873 Offset += RI->getSlotSize();
875 unsigned Align = MFI->getObjectAlignment(FI);
876 assert((-(Offset + StackSize)) % Align == 0);
878 return Offset + StackSize;
880 // FIXME: Support tail calls
883 return Offset + StackSize;
885 // Skip the saved EBP.
886 Offset += RI->getSlotSize();
888 // Skip the RETADDR move area
889 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
890 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
891 if (TailCallReturnAddrDelta < 0)
892 Offset -= TailCallReturnAddrDelta;
898 bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
899 MachineBasicBlock::iterator MI,
900 const std::vector<CalleeSavedInfo> &CSI,
901 const TargetRegisterInfo *TRI) const {
905 DebugLoc DL = MBB.findDebugLoc(MI);
907 MachineFunction &MF = *MBB.getParent();
909 unsigned SlotSize = STI.is64Bit() ? 8 : 4;
910 unsigned FPReg = TRI->getFrameRegister(MF);
911 unsigned CalleeFrameSize = 0;
913 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
914 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
916 // Push GPRs. It increases frame size.
917 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
918 for (unsigned i = CSI.size(); i != 0; --i) {
919 unsigned Reg = CSI[i-1].getReg();
920 if (!X86::GR64RegClass.contains(Reg) &&
921 !X86::GR32RegClass.contains(Reg))
923 // Add the callee-saved register as live-in. It's killed at the spill.
926 // X86RegisterInfo::emitPrologue will handle spilling of frame register.
928 CalleeFrameSize += SlotSize;
929 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill)
930 .setMIFlag(MachineInstr::FrameSetup);
933 X86FI->setCalleeSavedFrameSize(CalleeFrameSize);
935 // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
936 // It can be done by spilling XMMs to stack frame.
937 // Note that only Win64 ABI might spill XMMs.
938 for (unsigned i = CSI.size(); i != 0; --i) {
939 unsigned Reg = CSI[i-1].getReg();
940 if (X86::GR64RegClass.contains(Reg) ||
941 X86::GR32RegClass.contains(Reg))
943 // Add the callee-saved register as live-in. It's killed at the spill.
945 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
946 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(),
953 bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
954 MachineBasicBlock::iterator MI,
955 const std::vector<CalleeSavedInfo> &CSI,
956 const TargetRegisterInfo *TRI) const {
960 DebugLoc DL = MBB.findDebugLoc(MI);
962 MachineFunction &MF = *MBB.getParent();
963 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
965 // Reload XMMs from stack frame.
966 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
967 unsigned Reg = CSI[i].getReg();
968 if (X86::GR64RegClass.contains(Reg) ||
969 X86::GR32RegClass.contains(Reg))
971 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
972 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(),
977 unsigned FPReg = TRI->getFrameRegister(MF);
978 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
979 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
980 unsigned Reg = CSI[i].getReg();
981 if (!X86::GR64RegClass.contains(Reg) &&
982 !X86::GR32RegClass.contains(Reg))
985 // X86RegisterInfo::emitEpilogue will handle restoring of frame register.
987 BuildMI(MBB, MI, DL, TII.get(Opc), Reg);
993 X86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
994 RegScavenger *RS) const {
995 MachineFrameInfo *MFI = MF.getFrameInfo();
996 const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
997 unsigned SlotSize = RegInfo->getSlotSize();
999 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1000 int32_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1002 if (TailCallReturnAddrDelta < 0) {
1003 // create RETURNADDR area
1012 MFI->CreateFixedObject(-TailCallReturnAddrDelta,
1013 (-1U*SlotSize)+TailCallReturnAddrDelta, true);
1017 assert((TailCallReturnAddrDelta <= 0) &&
1018 "The Delta should always be zero or negative");
1019 const TargetFrameLowering &TFI = *MF.getTarget().getFrameLowering();
1021 // Create a frame entry for the EBP register that must be saved.
1022 int FrameIdx = MFI->CreateFixedObject(SlotSize,
1024 TFI.getOffsetOfLocalArea() +
1025 TailCallReturnAddrDelta,
1027 assert(FrameIdx == MFI->getObjectIndexBegin() &&
1028 "Slot for EBP register must be last in order to be found!");