1 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes functions that may be used with BuildMI from the
11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
13 // The BuildMem function may be used with the BuildMI function to add entire
14 // memory references in a single, typed, function call. X86 memory references
15 // can be very complex expressions (described in the README), so wrapping them
16 // up behind an easier to use interface makes sense. Descriptions of the
17 // functions are included below.
19 // For reference, the order of operands for memory references is:
20 // (Operand), Base, Scale, Index, Displacement.
22 //===----------------------------------------------------------------------===//
24 #ifndef X86INSTRBUILDER_H
25 #define X86INSTRBUILDER_H
27 #include "llvm/CodeGen/MachineInstrBuilder.h"
31 /// X86AddressMode - This struct holds a generalized full x86 address mode.
32 /// The base register can be a frame index, which will eventually be replaced
33 /// with BP or SP and Disp being offsetted accordingly.
34 /// FIXME: add support for globals as a new base type.
35 struct X86AddressMode {
51 X86AddressMode() : BaseType(UnknownBase) {}
54 /// addDirectMem - This function is used to add a direct memory reference to the
55 /// current instruction -- that is, a dereference of an address in a register,
56 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
58 inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
60 // Because memory references are always represented with four
61 // values, this adds: Reg, [1, NoReg, 0] to the instruction.
62 return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
66 /// addRegOffset - This function is used to add a memory reference of the form
67 /// [Reg + Offset], i.e., one with no scale or index, but with a
68 /// displacement. An example is: DWORD PTR [EAX + 4].
70 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
71 unsigned Reg, int Offset) {
72 return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
75 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
76 const X86AddressMode &AM) {
77 assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
79 if (AM.BaseType == X86AddressMode::RegBase)
80 MIB.addReg(AM.Base.Reg);
81 else if (AM.BaseType == X86AddressMode::FrameIndexBase)
82 MIB.addFrameIndex(AM.Base.FrameIndex);
85 return MIB.addZImm(AM.Scale).addReg(AM.IndexReg).addSImm(AM.Disp);
88 /// addFrameReference - This function is used to add a reference to the base of
89 /// an abstract object on the stack frame of the current function. This
90 /// reference has base register as the FrameIndex offset until it is resolved.
91 /// This allows a constant offset to be specified as well...
93 inline const MachineInstrBuilder &
94 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
95 return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
98 /// addConstantPoolReference - This function is used to add a reference to the
99 /// base of a constant value spilled to the per-function constant pool. The
100 /// reference has base register ConstantPoolIndex offset which is retained until
101 /// either machine code emission or assembly output. This allows an optional
102 /// offset to be added as well.
104 inline const MachineInstrBuilder &
105 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
107 return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
110 } // End llvm namespace