1 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes functions that may be used with BuildMI from the
11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
13 // The BuildMem function may be used with the BuildMI function to add entire
14 // memory references in a single, typed, function call. X86 memory references
15 // can be very complex expressions (described in the README), so wrapping them
16 // up behind an easier to use interface makes sense. Descriptions of the
17 // functions are included below.
19 // For reference, the order of operands for memory references is:
20 // (Operand), Base, Scale, Index, Displacement.
22 //===----------------------------------------------------------------------===//
24 #ifndef X86INSTRBUILDER_H
25 #define X86INSTRBUILDER_H
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
33 /// X86AddressMode - This struct holds a generalized full x86 address mode.
34 /// The base register can be a frame index, which will eventually be replaced
35 /// with BP or SP and Disp being offsetted accordingly. The displacement may
36 /// also include the offset of a global value.
37 struct X86AddressMode {
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
60 /// addDirectMem - This function is used to add a direct memory reference to the
61 /// current instruction -- that is, a dereference of an address in a register,
62 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
64 inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
66 // Because memory references are always represented with four
67 // values, this adds: Reg, [1, NoReg, 0] to the instruction.
68 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
71 inline const MachineInstrBuilder &addLeaOffset(const MachineInstrBuilder &MIB,
73 return MIB.addImm(1).addReg(0).addImm(Offset);
76 inline const MachineInstrBuilder &addOffset(const MachineInstrBuilder &MIB,
78 return addLeaOffset(MIB, Offset).addReg(0);
81 /// addRegOffset - This function is used to add a memory reference of the form
82 /// [Reg + Offset], i.e., one with no scale or index, but with a
83 /// displacement. An example is: DWORD PTR [EAX + 4].
85 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
86 unsigned Reg, bool isKill,
88 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
91 inline const MachineInstrBuilder &addLeaRegOffset(const MachineInstrBuilder &MIB,
92 unsigned Reg, bool isKill,
94 return addLeaOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
97 /// addRegReg - This function is used to add a memory reference of the form:
99 inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
100 unsigned Reg1, bool isKill1,
101 unsigned Reg2, bool isKill2) {
102 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
103 .addReg(Reg2, getKillRegState(isKill2)).addImm(0);
106 inline const MachineInstrBuilder &addLeaAddress(const MachineInstrBuilder &MIB,
107 const X86AddressMode &AM) {
108 assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
110 if (AM.BaseType == X86AddressMode::RegBase)
111 MIB.addReg(AM.Base.Reg);
112 else if (AM.BaseType == X86AddressMode::FrameIndexBase)
113 MIB.addFrameIndex(AM.Base.FrameIndex);
116 MIB.addImm(AM.Scale).addReg(AM.IndexReg);
118 return MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
120 return MIB.addImm(AM.Disp);
123 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
124 const X86AddressMode &AM) {
125 return addLeaAddress(MIB, AM).addReg(0);
128 /// addFrameReference - This function is used to add a reference to the base of
129 /// an abstract object on the stack frame of the current function. This
130 /// reference has base register as the FrameIndex offset until it is resolved.
131 /// This allows a constant offset to be specified as well...
133 inline const MachineInstrBuilder &
134 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
135 MachineInstr *MI = MIB;
136 MachineFunction &MF = *MI->getParent()->getParent();
137 MachineFrameInfo &MFI = *MF.getFrameInfo();
138 const TargetInstrDesc &TID = MI->getDesc();
141 Flags |= MachineMemOperand::MOLoad;
143 Flags |= MachineMemOperand::MOStore;
144 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(FI),
146 MFI.getObjectOffset(FI) + Offset,
147 MFI.getObjectSize(FI),
148 MFI.getObjectAlignment(FI));
149 return addOffset(MIB.addFrameIndex(FI), Offset)
153 /// addConstantPoolReference - This function is used to add a reference to the
154 /// base of a constant value spilled to the per-function constant pool. The
155 /// reference uses the abstract ConstantPoolIndex which is retained until
156 /// either machine code emission or assembly output. In PIC mode on x86-32,
157 /// the GlobalBaseReg parameter can be used to make this a
158 /// GlobalBaseReg-relative reference.
160 inline const MachineInstrBuilder &
161 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
162 unsigned GlobalBaseReg, unsigned char OpFlags) {
164 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
165 .addConstantPoolIndex(CPI, 0, OpFlags).addReg(0);
168 } // End llvm namespace