1 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes functions that may be used with BuildMI from the
11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
13 // The BuildMem function may be used with the BuildMI function to add entire
14 // memory references in a single, typed, function call. X86 memory references
15 // can be very complex expressions (described in the README), so wrapping them
16 // up behind an easier to use interface makes sense. Descriptions of the
17 // functions are included below.
19 // For reference, the order of operands for memory references is:
20 // (Operand), Base, Scale, Index, Displacement.
22 //===----------------------------------------------------------------------===//
24 #ifndef X86INSTRBUILDER_H
25 #define X86INSTRBUILDER_H
27 #include "llvm/CodeGen/MachineInstrBuilder.h"
31 /// X86AddressMode - This struct holds a generalized full x86 address mode.
32 /// The base register can be a frame index, which will eventually be replaced
33 /// with BP or SP and Disp being offsetted accordingly. The displacement may
34 /// also include the offset of a global value.
35 struct X86AddressMode {
51 X86AddressMode() : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0) {
56 /// addDirectMem - This function is used to add a direct memory reference to the
57 /// current instruction -- that is, a dereference of an address in a register,
58 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
60 inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
62 // Because memory references are always represented with four
63 // values, this adds: Reg, [1, NoReg, 0] to the instruction.
64 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
68 /// addRegOffset - This function is used to add a memory reference of the form
69 /// [Reg + Offset], i.e., one with no scale or index, but with a
70 /// displacement. An example is: DWORD PTR [EAX + 4].
72 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
73 unsigned Reg, bool isKill,
75 return MIB.addReg(Reg, false, false, isKill)
76 .addImm(1).addReg(0).addImm(Offset);
79 /// addRegReg - This function is used to add a memory reference of the form:
81 inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
82 unsigned Reg1, bool isKill1,
83 unsigned Reg2, bool isKill2) {
84 return MIB.addReg(Reg1, false, false, isKill1).addImm(1)
85 .addReg(Reg2, false, false, isKill2).addImm(0);
88 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
89 const X86AddressMode &AM) {
90 assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
92 if (AM.BaseType == X86AddressMode::RegBase)
93 MIB.addReg(AM.Base.Reg);
94 else if (AM.BaseType == X86AddressMode::FrameIndexBase)
95 MIB.addFrameIndex(AM.Base.FrameIndex);
98 MIB.addImm(AM.Scale).addReg(AM.IndexReg);
100 return MIB.addGlobalAddress(AM.GV, AM.Disp);
102 return MIB.addImm(AM.Disp);
105 /// addFrameReference - This function is used to add a reference to the base of
106 /// an abstract object on the stack frame of the current function. This
107 /// reference has base register as the FrameIndex offset until it is resolved.
108 /// This allows a constant offset to be specified as well...
110 inline const MachineInstrBuilder &
111 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
112 return MIB.addFrameIndex(FI).addImm(1).addReg(0).addImm(Offset);
115 /// addConstantPoolReference - This function is used to add a reference to the
116 /// base of a constant value spilled to the per-function constant pool. The
117 /// reference has base register ConstantPoolIndex offset which is retained until
118 /// either machine code emission or assembly output. This allows an optional
119 /// offset to be added as well.
121 inline const MachineInstrBuilder &
122 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
124 assert(Offset == 0 && "Non-zero offsets not supported!");
125 return MIB.addReg(0).addImm(1).addReg(0).addConstantPoolIndex(CPI);
128 } // End llvm namespace