1 //===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "X86InstrInfo.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "X86GenInstrInfo.inc"
20 X86InstrInfo::X86InstrInfo()
21 : TargetInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0])) {
25 bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
27 unsigned& destReg) const {
28 MachineOpCode oc = MI.getOpcode();
29 if (oc == X86::MOV8rr || oc == X86::MOV16rr || oc == X86::MOV32rr ||
31 assert(MI.getNumOperands() == 2 &&
32 MI.getOperand(0).isRegister() &&
33 MI.getOperand(1).isRegister() &&
34 "invalid register-register move instruction");
35 sourceReg = MI.getOperand(1).getReg();
36 destReg = MI.getOperand(0).getReg();
42 void X86InstrInfo::insertGoto(MachineBasicBlock& MBB,
43 MachineBasicBlock& TMBB) const {
44 BuildMI(MBB, MBB.end(), X86::JMP, 1).addMBB(&TMBB);
47 MachineBasicBlock::iterator
48 X86InstrInfo::reverseBranchCondition(MachineBasicBlock::iterator MI) const {
49 unsigned Opcode = MI->getOpcode();
50 assert(isBranch(Opcode) && "MachineInstr must be a branch");
53 case X86::JB: ROpcode = X86::JAE;
54 case X86::JAE: ROpcode = X86::JB;
55 case X86::JE: ROpcode = X86::JNE;
56 case X86::JNE: ROpcode = X86::JE;
57 case X86::JBE: ROpcode = X86::JA;
58 case X86::JA: ROpcode = X86::JBE;
59 case X86::JS: ROpcode = X86::JNS;
60 case X86::JNS: ROpcode = X86::JS;
61 case X86::JL: ROpcode = X86::JGE;
62 case X86::JGE: ROpcode = X86::JL;
63 case X86::JLE: ROpcode = X86::JG;
64 case X86::JG: ROpcode = X86::JLE;
66 assert(0 && "Cannot reverse uncodnitional branches!");
68 MachineBasicBlock* MBB = MI->getParent();
69 MachineBasicBlock* TMBB = MI->getOperand(0).getMachineBasicBlock();
70 MachineInstrBuilder IB = BuildMI(*MBB, MBB->erase(MI), ROpcode, 1);