1 //===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===//
3 // This file contains the X86 implementation of the MachineInstrInfo class.
5 //===----------------------------------------------------------------------===//
7 #ifndef X86INSTRUCTIONINFO_H
8 #define X86INSTRUCTIONINFO_H
10 #include "llvm/Target/MachineInstrInfo.h"
11 #include "X86RegisterInfo.h"
13 /// X86II - This namespace holds all of the target specific flags that
14 /// instruction info tracks.
18 //===------------------------------------------------------------------===//
19 // Instruction types. These are the standard/most common forms for X86
23 /// Raw - This form is for instructions that don't have any operands, so
24 /// they are just a fixed opcode value, like 'leave'.
27 /// AddRegFrm - This form is used for instructions like 'push r32' that have
28 /// their one register operand added to their opcode.
31 /// MRMDestReg - This form is used for instructions that use the Mod/RM byte
32 /// to specify a destination, which in this case is a register.
36 /// MRMDestMem - This form is used for instructions that use the Mod/RM byte
37 /// to specify a destination, which in this case is memory.
41 /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte
42 /// to specify a source, which in this case is a register.
46 /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte
47 /// to specify a source, which in this case is memory.
51 /// MRMS[0-7][rm] - These forms are used to represent instructions that use
52 /// a Mod/RM byte, and use the middle field to hold extended opcode
53 /// information. In the intel manual these are represented as /0, /1, ...
56 // First, instructions that operate on a register r/m operand...
57 MRMS0r = 16, MRMS1r = 17, MRMS2r = 18, MRMS3r = 19, // Format /0 /1 /2 /3
58 MRMS4r = 20, MRMS5r = 21, MRMS6r = 22, MRMS7r = 23, // Format /4 /5 /6 /7
60 // Next, instructions that operate on a memory r/m operand...
61 MRMS0m = 24, MRMS1m = 25, MRMS2m = 26, MRMS3m = 27, // Format /0 /1 /2 /3
62 MRMS4m = 28, MRMS5m = 29, MRMS6m = 30, MRMS7m = 31, // Format /4 /5 /6 /7
66 //===------------------------------------------------------------------===//
69 /// Void - Set if this instruction produces no value
72 // TB - TwoByte - Set if this instruction has a two byte opcode, which
73 // starts with a 0x0F byte before the real opcode.
76 // FIXME: There are several more two byte opcode escapes: D8-DF
79 // OpSize - Set if this instruction requires an operand size prefix (0x66),
80 // which most often indicates that the instruction operates on 16 bit data
81 // instead of 32 bit data.
84 // This three-bit field describes the size of a memory operand.
85 // I'm just being paranoid not using the zero value; there's
86 // probably no reason you couldn't use it.
97 class X86InstrInfo : public MachineInstrInfo {
98 const X86RegisterInfo RI;
102 /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info. As
103 /// such, whenever a client has an instance of instruction info, it should
104 /// always be able to get register info as well (through this method).
106 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
108 /// print - Print out an x86 instruction in intel syntax
110 virtual void print(const MachineInstr *MI, std::ostream &O,
111 const TargetMachine &TM) const;
113 // getBaseOpcodeFor - This function returns the "base" X86 opcode for the
114 // specified opcode number.
116 unsigned char getBaseOpcodeFor(unsigned Opcode) const;
120 //===--------------------------------------------------------------------===//
122 // These are stubs for pure virtual methods that should be factored out of
123 // MachineInstrInfo. We never call them, we don't want them, but we need
124 // stubs so that we can instatiate our class.
126 MachineOpCode getNOPOpCode() const { abort(); }
127 void CreateCodeToLoadConst(const TargetMachine& target, Function* F,
128 Value *V, Instruction *I,
129 std::vector<MachineInstr*>& mvec,
130 MachineCodeForInstruction& mcfi) const { abort(); }
131 void CreateCodeToCopyIntToFloat(const TargetMachine& target,
132 Function* F, Value* val, Instruction* dest,
133 std::vector<MachineInstr*>& mvec,
134 MachineCodeForInstruction& mcfi) const {
137 void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F,
138 Value* val, Instruction* dest,
139 std::vector<MachineInstr*>& mvec,
140 MachineCodeForInstruction& mcfi)const {
143 void CreateCopyInstructionsByType(const TargetMachine& target,
144 Function* F, Value* src,
146 std::vector<MachineInstr*>& mvec,
147 MachineCodeForInstruction& mcfi)const {
151 void CreateSignExtensionInstructions(const TargetMachine& target,
152 Function* F, Value* srcVal,
153 Value* destVal, unsigned numLowBits,
154 std::vector<MachineInstr*>& mvec,
155 MachineCodeForInstruction& mcfi) const {
159 void CreateZeroExtensionInstructions(const TargetMachine& target,
160 Function* F, Value* srcVal,
161 Value* destVal, unsigned srcSizeInBits,
162 std::vector<MachineInstr*>& mvec,
163 MachineCodeForInstruction& mcfi) const {