1 //===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to Intel format assembly language.
12 // This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86IntelAsmPrinter.h"
18 #include "llvm/Module.h"
19 #include "llvm/Assembly/Writer.h"
20 #include "llvm/Support/Mangler.h"
21 #include "llvm/Target/TargetOptions.h"
24 /// runOnMachineFunction - This uses the printMachineInstruction()
25 /// method to print assembly for each instruction.
27 bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
29 // Let PassManager know we need debug information and relay
30 // the MachineDebugInfo address on to DwarfWriter.
31 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
34 SetupMachineFunction(MF);
37 // Print out constants referenced by the function
38 EmitConstantPool(MF.getConstantPool());
40 // Print out labels for the function.
41 SwitchSection("\t.text\n", MF.getFunction());
43 O << "\t.globl\t" << CurrentFnName << "\n";
44 if (HasDotTypeDotSizeDirective)
45 O << "\t.type\t" << CurrentFnName << ", @function\n";
46 O << CurrentFnName << ":\n";
49 // Emit pre-function debug information.
50 DW.BeginFunction(&MF);
53 // Print out code for the function.
54 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
56 // Print a label for the basic block if there are any predecessors.
57 if (I->pred_begin() != I->pred_end())
58 O << PrivateGlobalPrefix << "BB" << CurrentFnName << "_" << I->getNumber()
60 << CommentString << " " << I->getBasicBlock()->getName() << "\n";
61 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
63 // Print the assembly for the instruction.
65 printMachineInstruction(II);
70 // Emit post-function debug information.
74 // We didn't modify anything.
78 void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
79 unsigned char value = MI->getOperand(Op).getImmedValue();
80 assert(value <= 7 && "Invalid ssecc argument!");
82 case 0: O << "eq"; break;
83 case 1: O << "lt"; break;
84 case 2: O << "le"; break;
85 case 3: O << "unord"; break;
86 case 4: O << "neq"; break;
87 case 5: O << "nlt"; break;
88 case 6: O << "nle"; break;
89 case 7: O << "ord"; break;
93 void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
94 const char *Modifier) {
95 const MRegisterInfo &RI = *TM.getRegisterInfo();
96 switch (MO.getType()) {
97 case MachineOperand::MO_VirtualRegister:
98 if (Value *V = MO.getVRegValueOrNull()) {
99 O << "<" << V->getName() << ">";
103 case MachineOperand::MO_MachineRegister:
104 if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
105 // Bug Workaround: See note in Printer::doInitialization about %.
106 O << "%" << RI.get(MO.getReg()).Name;
108 O << "%reg" << MO.getReg();
111 case MachineOperand::MO_SignExtendedImmed:
112 case MachineOperand::MO_UnextendedImmed:
113 O << (int)MO.getImmedValue();
115 case MachineOperand::MO_MachineBasicBlock:
116 printBasicBlockLabel(MO.getMachineBasicBlock());
118 case MachineOperand::MO_PCRelativeDisp:
119 assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs");
122 case MachineOperand::MO_ConstantPoolIndex: {
123 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
124 if (!isMemOp) O << "OFFSET ";
125 O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
126 << MO.getConstantPoolIndex();
127 if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
128 O << "-\"L" << getFunctionNumber() << "$pb\"";
129 int Offset = MO.getOffset();
131 O << " + " << Offset;
137 case MachineOperand::MO_GlobalAddress: {
138 bool isCallOp = Modifier && !strcmp(Modifier, "call");
139 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
140 if (!isMemOp && !isCallOp) O << "OFFSET ";
141 if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
142 GlobalValue *GV = MO.getGlobal();
143 std::string Name = Mang->getValueName(GV);
144 if (!isMemOp && !isCallOp) O << '$';
145 // Link-once, External, or Weakly-linked global variables need
146 // non-lazily-resolved stubs
147 if (GV->isExternal() || GV->hasWeakLinkage() ||
148 GV->hasLinkOnceLinkage()) {
149 // Dynamically-resolved functions need a stub for the function.
150 if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
151 FnStubs.insert(Name);
152 O << "L" << Name << "$stub";
154 GVStubs.insert(Name);
155 O << "L" << Name << "$non_lazy_ptr";
158 O << Mang->getValueName(GV);
160 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC)
161 O << "-\"L" << getFunctionNumber() << "$pb\"";
163 O << Mang->getValueName(MO.getGlobal());
164 int Offset = MO.getOffset();
166 O << " + " << Offset;
171 case MachineOperand::MO_ExternalSymbol: {
172 bool isCallOp = Modifier && !strcmp(Modifier, "call");
173 if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
174 std::string Name(GlobalPrefix);
175 Name += MO.getSymbolName();
176 FnStubs.insert(Name);
177 O << "L" << Name << "$stub";
180 if (!isCallOp) O << "OFFSET ";
181 O << GlobalPrefix << MO.getSymbolName();
185 O << "<unknown operand type>"; return;
189 void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
190 assert(isMem(MI, Op) && "Invalid memory reference!");
192 const MachineOperand &BaseReg = MI->getOperand(Op);
193 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
194 const MachineOperand &IndexReg = MI->getOperand(Op+2);
195 const MachineOperand &DispSpec = MI->getOperand(Op+3);
197 if (BaseReg.isFrameIndex()) {
198 O << "[frame slot #" << BaseReg.getFrameIndex();
199 if (DispSpec.getImmedValue())
200 O << " + " << DispSpec.getImmedValue();
206 bool NeedPlus = false;
207 if (BaseReg.getReg()) {
208 printOp(BaseReg, "mem");
212 if (IndexReg.getReg()) {
213 if (NeedPlus) O << " + ";
215 O << ScaleVal << "*";
220 if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
223 printOp(DispSpec, "mem");
225 int DispVal = DispSpec.getImmedValue();
226 if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
240 void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
241 O << "\"L" << getFunctionNumber() << "$pb\"\n";
242 O << "\"L" << getFunctionNumber() << "$pb\":";
245 bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
247 const MRegisterInfo &RI = *TM.getRegisterInfo();
248 unsigned Reg = MO.getReg();
249 const char *Name = RI.get(Reg).Name;
251 default: return true; // Unknown mode.
252 case 'b': // Print QImode register
254 default: return true;
255 case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
258 case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
261 case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
264 case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
281 case 'h': // Print QImode high register
283 default: return true;
284 case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
287 case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
290 case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
293 case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
298 case 'w': // Print HImode register
300 default: return true;
301 case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
304 case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
307 case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
310 case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
327 case 'k': // Print SImode register
329 default: return true;
330 case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
333 case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
336 case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
339 case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
362 /// PrintAsmOperand - Print out an operand for an inline asm expression.
364 bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
366 const char *ExtraCode) {
367 // Does this asm operand have a single letter operand modifier?
368 if (ExtraCode && ExtraCode[0]) {
369 if (ExtraCode[1] != 0) return true; // Unknown modifier.
371 switch (ExtraCode[0]) {
372 default: return true; // Unknown modifier.
373 case 'b': // Print QImode register
374 case 'h': // Print QImode high register
375 case 'w': // Print HImode register
376 case 'k': // Print SImode register
377 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
381 printOperand(MI, OpNo);
385 bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
388 const char *ExtraCode) {
389 if (ExtraCode && ExtraCode[0])
390 return true; // Unknown modifier.
391 printMemReference(MI, OpNo);
395 /// printMachineInstruction -- Print out a single X86 LLVM instruction
396 /// MI in Intel syntax to the current output stream.
398 void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
401 // Call the autogenerated instruction printer routines.
402 printInstruction(MI);
405 bool X86IntelAsmPrinter::doInitialization(Module &M) {
406 X86SharedAsmPrinter::doInitialization(M);
407 // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
409 // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
410 // instruction as a reference to the register named sp, and if you try to
411 // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
412 // before being looked up in the symbol table. This creates spurious
413 // `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
414 // mode, and decorate all register names with percent signs.
415 O << "\t.intel_syntax\n";
419 // Include the auto-generated portion of the assembly writer.
420 #include "X86GenAsmWriter1.inc"