1 //===-- X86PeepholeOpt.cpp - X86 Peephole Optimizer -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a peephole optimizer for the X86.
12 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/Target/MRegisterInfo.h"
18 #include "llvm/Target/TargetInstrInfo.h"
19 #include "llvm/Target/TargetMachine.h"
20 #include "llvm/ADT/Statistic.h"
21 #include "llvm/ADT/STLExtras.h"
25 Statistic<> NumPHOpts("x86-peephole",
26 "Number of peephole optimization performed");
27 Statistic<> NumPHMoves("x86-peephole", "Number of peephole moves folded");
28 struct PH : public MachineFunctionPass {
29 virtual bool runOnMachineFunction(MachineFunction &MF);
31 bool PeepholeOptimize(MachineBasicBlock &MBB,
32 MachineBasicBlock::iterator &I);
34 virtual const char *getPassName() const { return "X86 Peephole Optimizer"; }
38 FunctionPass *llvm::createX86PeepholeOptimizerPass() { return new PH(); }
40 bool PH::runOnMachineFunction(MachineFunction &MF) {
43 for (MachineFunction::iterator BI = MF.begin(), E = MF.end(); BI != E; ++BI)
44 for (MachineBasicBlock::iterator I = BI->begin(); I != BI->end(); )
45 if (PeepholeOptimize(*BI, I)) {
55 bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
56 MachineBasicBlock::iterator &I) {
57 assert(I != MBB.end());
58 MachineBasicBlock::iterator NextI = next(I);
61 MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
63 switch (MI->getOpcode()) {
66 case X86::MOV32rr: // Destroy X = X copies...
67 if (MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
73 // A large number of X86 instructions have forms which take an 8-bit
74 // immediate despite the fact that the operands are 16 or 32 bits. Because
75 // this can save three bytes of code size (and icache space), we want to
76 // shrink them if possible.
77 case X86::IMUL16rri: case X86::IMUL32rri:
78 assert(MI->getNumOperands() == 3 && "These should all have 3 operands!");
79 if (MI->getOperand(2).isImmediate()) {
80 int Val = MI->getOperand(2).getImmedValue();
81 // If the value is the same when signed extended from 8 bits...
82 if (Val == (signed int)(signed char)Val) {
84 switch (MI->getOpcode()) {
85 default: assert(0 && "Unknown opcode value!");
86 case X86::IMUL16rri: Opcode = X86::IMUL16rri8; break;
87 case X86::IMUL32rri: Opcode = X86::IMUL32rri8; break;
89 unsigned R0 = MI->getOperand(0).getReg();
90 unsigned R1 = MI->getOperand(1).getReg();
91 I = MBB.insert(MBB.erase(I),
92 BuildMI(Opcode, 2, R0).addReg(R1).addZImm((char)Val));
98 case X86::ADD16ri: case X86::ADD32ri: case X86::ADC32ri:
99 case X86::SUB16ri: case X86::SUB32ri:
100 case X86::SBB16ri: case X86::SBB32ri:
101 case X86::AND16ri: case X86::AND32ri:
102 case X86::OR16ri: case X86::OR32ri:
103 case X86::XOR16ri: case X86::XOR32ri:
104 assert(MI->getNumOperands() == 2 && "These should all have 2 operands!");
105 if (MI->getOperand(1).isImmediate()) {
106 int Val = MI->getOperand(1).getImmedValue();
107 // If the value is the same when signed extended from 8 bits...
108 if (Val == (signed int)(signed char)Val) {
110 switch (MI->getOpcode()) {
111 default: assert(0 && "Unknown opcode value!");
112 case X86::ADD16ri: Opcode = X86::ADD16ri8; break;
113 case X86::ADD32ri: Opcode = X86::ADD32ri8; break;
114 case X86::ADC32ri: Opcode = X86::ADC32ri8; break;
115 case X86::SUB16ri: Opcode = X86::SUB16ri8; break;
116 case X86::SUB32ri: Opcode = X86::SUB32ri8; break;
117 case X86::SBB16ri: Opcode = X86::SBB16ri8; break;
118 case X86::SBB32ri: Opcode = X86::SBB32ri8; break;
119 case X86::AND16ri: Opcode = X86::AND16ri8; break;
120 case X86::AND32ri: Opcode = X86::AND32ri8; break;
121 case X86::OR16ri: Opcode = X86::OR16ri8; break;
122 case X86::OR32ri: Opcode = X86::OR32ri8; break;
123 case X86::XOR16ri: Opcode = X86::XOR16ri8; break;
124 case X86::XOR32ri: Opcode = X86::XOR32ri8; break;
126 unsigned R0 = MI->getOperand(0).getReg();
127 I = MBB.insert(MBB.erase(I),
128 BuildMI(Opcode, 1, R0, MachineOperand::UseAndDef)
129 .addZImm((char)Val));
135 case X86::ADD16mi: case X86::ADD32mi: case X86::ADC32mi:
136 case X86::SUB16mi: case X86::SUB32mi:
137 case X86::SBB16mi: case X86::SBB32mi:
138 case X86::AND16mi: case X86::AND32mi:
139 case X86::OR16mi: case X86::OR32mi:
140 case X86::XOR16mi: case X86::XOR32mi:
141 assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
142 if (MI->getOperand(4).isImmediate()) {
143 int Val = MI->getOperand(4).getImmedValue();
144 // If the value is the same when signed extended from 8 bits...
145 if (Val == (signed int)(signed char)Val) {
147 switch (MI->getOpcode()) {
148 default: assert(0 && "Unknown opcode value!");
149 case X86::ADD16mi: Opcode = X86::ADD16mi8; break;
150 case X86::ADD32mi: Opcode = X86::ADD32mi8; break;
151 case X86::ADC32mi: Opcode = X86::ADC32mi8; break;
152 case X86::SUB16mi: Opcode = X86::SUB16mi8; break;
153 case X86::SUB32mi: Opcode = X86::SUB32mi8; break;
154 case X86::SBB16mi: Opcode = X86::SBB16mi8; break;
155 case X86::SBB32mi: Opcode = X86::SBB32mi8; break;
156 case X86::AND16mi: Opcode = X86::AND16mi8; break;
157 case X86::AND32mi: Opcode = X86::AND32mi8; break;
158 case X86::OR16mi: Opcode = X86::OR16mi8; break;
159 case X86::OR32mi: Opcode = X86::OR32mi8; break;
160 case X86::XOR16mi: Opcode = X86::XOR16mi8; break;
161 case X86::XOR32mi: Opcode = X86::XOR32mi8; break;
163 unsigned R0 = MI->getOperand(0).getReg();
164 unsigned Scale = MI->getOperand(1).getImmedValue();
165 unsigned R1 = MI->getOperand(2).getReg();
166 if (MI->getOperand(3).isImmediate()) {
167 unsigned Offset = MI->getOperand(3).getImmedValue();
168 I = MBB.insert(MBB.erase(I),
169 BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
170 addReg(R1).addSImm(Offset).addZImm((char)Val));
171 } else if (MI->getOperand(3).isGlobalAddress()) {
172 GlobalValue *GA = MI->getOperand(3).getGlobal();
173 int Offset = MI->getOperand(3).getOffset();
174 I = MBB.insert(MBB.erase(I),
175 BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
176 addReg(R1).addGlobalAddress(GA, false, Offset).