1 //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
3 // This file contains the X86 implementation of the MRegisterInfo class. This
4 // file is responsible for the frame pointer elimination optimization on X86.
6 //===----------------------------------------------------------------------===//
9 #include "X86RegisterInfo.h"
10 #include "X86InstrBuilder.h"
11 #include "llvm/Constants.h"
12 #include "llvm/Type.h"
13 #include "llvm/CodeGen/ValueTypes.h"
14 #include "llvm/CodeGen/MachineInstrBuilder.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetFrameInfo.h"
19 #include "Support/CommandLine.h"
23 NoFPElim("disable-fp-elim",
24 cl::desc("Disable frame pointer elimination optimization"));
27 X86RegisterInfo::X86RegisterInfo()
28 : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
30 static unsigned getIdx(const TargetRegisterClass *RC) {
31 switch (RC->getSize()) {
32 default: assert(0 && "Invalid data size!");
40 void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
41 MachineBasicBlock::iterator &MBBI,
42 unsigned SrcReg, int FrameIdx,
43 const TargetRegisterClass *RC) const {
44 static const unsigned Opcode[] =
45 { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
46 MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
47 FrameIdx).addReg(SrcReg);
48 MBBI = MBB.insert(MBBI, MI)+1;
51 void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
52 MachineBasicBlock::iterator &MBBI,
53 unsigned DestReg, int FrameIdx,
54 const TargetRegisterClass *RC) const{
55 static const unsigned Opcode[] =
56 { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
57 MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 4, DestReg),
59 MBBI = MBB.insert(MBBI, MI)+1;
62 void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator &MBBI,
64 unsigned DestReg, unsigned SrcReg,
65 const TargetRegisterClass *RC) const {
66 static const unsigned Opcode[] =
67 { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
68 MachineInstr *MI = BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg);
69 MBBI = MBB.insert(MBBI, MI)+1;
72 //===----------------------------------------------------------------------===//
73 // Stack Frame Processing methods
74 //===----------------------------------------------------------------------===//
76 // hasFP - Return true if the specified function should have a dedicated frame
77 // pointer register. This is true if the function has variable sized allocas or
78 // if frame pointer elimination is disabled.
80 static bool hasFP(MachineFunction &MF) {
81 return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
84 void X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
85 MachineBasicBlock &MBB,
86 MachineBasicBlock::iterator &I) const {
87 MachineInstr *New = 0, *Old = *I;;
89 // If we have a frame pointer, turn the adjcallstackup instruction into a
90 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
92 unsigned Amount = Old->getOperand(0).getImmedValue();
94 // We need to keep the stack aligned properly. To do this, we round the
95 // amount of space needed for the outgoing arguments up to the next
96 // alignment boundary.
97 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
98 Amount = (Amount+Align-1)/Align*Align;
100 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
101 New=BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(Amount);
103 assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
104 New=BuildMI(X86::ADDri32, 2, X86::ESP).addReg(X86::ESP).addZImm(Amount);
110 *I = New; // Replace the pseudo instruction with a new instruction...
112 I = MBB.erase(I);// Just delete the pseudo instruction...
116 void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
117 MachineBasicBlock::iterator &II) const {
119 MachineInstr &MI = **II;
120 while (!MI.getOperand(i).isFrameIndex()) {
122 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
125 int FrameIndex = MI.getOperand(i).getFrameIndex();
127 // This must be part of a four operand memory reference. Replace the
128 // FrameIndex with base register with EBP. Add add an offset to the offset.
129 MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
131 // Now add the frame object offset to the offset from EBP.
132 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
133 MI.getOperand(i+3).getImmedValue()+4;
136 Offset += MF.getFrameInfo()->getStackSize();
138 MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
141 void X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
144 // Create a frame entry for the EBP register that must be saved.
145 int FrameIdx = MF.getFrameInfo()->CreateStackObject(4, 4);
146 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 &&
147 "Slot for EBP register must be last in order to be found!");
151 void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
152 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
153 MachineBasicBlock::iterator MBBI = MBB.begin();
154 MachineFrameInfo *MFI = MF.getFrameInfo();
157 // Get the number of bytes to allocate from the FrameInfo
158 unsigned NumBytes = MFI->getStackSize();
160 // Get the offset of the stack slot for the EBP register... which is
161 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
162 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
164 if (NumBytes) { // adjust stack pointer: ESP -= numbytes
165 MI= BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes);
166 MBBI = MBB.insert(MBBI, MI)+1;
169 // Save EBP into the appropriate stack slot...
170 MI = addRegOffset(BuildMI(X86::MOVrm32, 5), // mov [ESP-<offset>], EBP
171 X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
172 MBBI = MBB.insert(MBBI, MI)+1;
174 // Update EBP with the new base value...
175 if (NumBytes == 0) // mov EBP, ESP
176 MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP);
177 else // lea EBP, [ESP+StackSize]
178 MI = addRegOffset(BuildMI(X86::LEAr32, 5, X86::EBP), X86::ESP, NumBytes);
180 MBBI = MBB.insert(MBBI, MI)+1;
183 // When we have no frame pointer, we reserve argument space for call sites
184 // in the function immediately on entry to the current function. This
185 // eliminates the need for add/sub ESP brackets around call sites.
187 NumBytes += MFI->getMaxCallFrameSize();
189 // Round the size to a multiple of the alignment (don't forget the 4 byte
191 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
192 NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
194 // Update frame info to pretend that this is part of the stack...
195 MFI->setStackSize(NumBytes);
198 // adjust stack pointer: ESP -= numbytes
199 MI= BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes);
200 MBB.insert(MBBI, MI);
205 void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
206 MachineBasicBlock &MBB) const {
207 const MachineFrameInfo *MFI = MF.getFrameInfo();
208 MachineBasicBlock::iterator MBBI = MBB.end()-1;
210 assert((*MBBI)->getOpcode() == X86::RET &&
211 "Can only insert epilog into returning blocks");
214 // Get the offset of the stack slot for the EBP register... which is
215 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
216 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
219 MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
220 MBBI = 1+MBB.insert(MBBI, MI);
222 // mov EBP, [ESP-<offset>]
223 MI = addRegOffset(BuildMI(X86::MOVmr32, 5, X86::EBP), X86::ESP, EBPOffset);
224 MBBI = 1+MBB.insert(MBBI, MI);
226 // Get the number of bytes allocated from the FrameInfo...
227 unsigned NumBytes = MFI->getStackSize();
229 if (NumBytes) { // adjust stack pointer back: ESP += numbytes
230 MI =BuildMI(X86::ADDri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes);
231 MBBI = 1+MBB.insert(MBBI, MI);
236 #include "X86GenRegisterInfo.inc"
238 const TargetRegisterClass*
239 X86RegisterInfo::getRegClassForType(const Type* Ty) const {
240 switch (Ty->getPrimitiveID()) {
242 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
243 default: assert(0 && "Invalid type to getClass!");
245 case Type::SByteTyID:
246 case Type::UByteTyID: return &R8Instance;
247 case Type::ShortTyID:
248 case Type::UShortTyID: return &R16Instance;
251 case Type::PointerTyID: return &R32Instance;
253 case Type::FloatTyID:
254 case Type::DoubleTyID: return &RFPInstance;