1 //===-- X86RegisterInfo.def - X86 Register Information ----------*- C++ -*-===//
3 // This file describes all of the registers that the X86 backend uses. It relies
4 // on an external 'R' macro being defined that takes the arguments specified
5 // below, and is used to make all of the information relevant to registers be in
8 //===----------------------------------------------------------------------===//
10 // NOTE: No include guards desired
13 #errror "Must define R macro before including X86/X86RegisterInfo.def!"
16 // Arguments passed into the R macro
17 // #1: Enum Name - This ends up being a symbol in the X86 namespace
18 // #2: Register name - The name of the register as used by the gnu assembler
19 // #3: Register Flags - A bitfield of flags or'd together from the
20 // MRegisterInfo.h file.
21 // #4: Target Specific Flags - Another bitfield containing X86 specific flags
25 // The first register must always be a 'noop' register for all backends. This
26 // is used as the destination register for instructions that do not produce a
27 // value. Some frontends may use this as an operand register to mean special
28 // things, for example, the Sparc backend uses R#0 to mean %g0 which always
29 // PRODUCES the value 0.
31 // The X86 backend uses this value as an operand register only in memory
32 // references where it means that there is no base or index register.
34 R(NoReg, "none", 0, 0)
37 // 32 bit registers, ordered as the processor does...
38 R(EAX, "EAX", MRF::INT32, 0)
39 R(ECX, "ECX", MRF::INT32, 0)
40 R(EDX, "EDX", MRF::INT32, 0)
41 R(EBX, "EBX", MRF::INT32, 0)
42 R(ESP, "ESP", MRF::INT32, 0)
43 R(EBP, "EBP", MRF::INT32, 0)
44 R(ESI, "ESI", MRF::INT32, 0)
45 R(EDI, "EDI", MRF::INT32, 0)
47 // 16 bit registers, aliased with the corresponding 32 bit registers above
48 R(AX, "AX", MRF::INT16, 0)
49 R(CX, "CX", MRF::INT16, 0)
50 R(DX, "Dx", MRF::INT16, 0)
51 R(BX, "BX", MRF::INT16, 0)
52 R(SP, "SP", MRF::INT16, 0)
53 R(BP, "BP", MRF::INT16, 0)
54 R(SI, "SI", MRF::INT16, 0)
55 R(DI, "DI", MRF::INT16, 0)
57 // 8 bit registers aliased with registers above as well
58 R(AL, "AL", MRF::INT8, 0)
59 R(CL, "CL", MRF::INT8, 0)
60 R(DL, "DL", MRF::INT8, 0)
61 R(BL, "BL", MRF::INT8, 0)
62 R(AH, "AH", MRF::INT8, 0)
63 R(CH, "CH", MRF::INT8, 0)
64 R(DH, "DH", MRF::INT8, 0)
65 R(BH, "BH", MRF::INT8, 0)
67 // Flags, Segment registers, etc...
69 // This is a slimy hack to make it possible to say that flags are clobbered...
70 // Ideally we'd model instructions based on which particular flag(s) they
72 R(EFLAGS, "EFLAGS", MRF::INT16, 0)
74 // We are now done with the R macro