1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
18 #include "X86GenRegisterInfo.h.inc"
22 class TargetInstrInfo;
23 class X86TargetMachine;
25 /// N86 namespace - Native X86 register numbers
29 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
33 /// DWARFFlavour - Flavour of dwarf regnumbers
35 namespace DWARFFlavour {
37 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
41 class X86RegisterInfo : public X86GenRegisterInfo {
44 const TargetInstrInfo &TII;
47 /// Is64Bit - Is the target 64-bits.
51 /// IsWin64 - Is the target on of win64 flavours
55 /// SlotSize - Stack slot size in bytes.
59 /// StackAlign - Default stack alignment.
63 /// StackPtr - X86 physical register used as stack ptr.
67 /// FramePtr - X86 physical register used as frame ptr.
72 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
74 /// getX86RegNum - Returns the native X86 register number for the given LLVM
75 /// register identifier.
76 static unsigned getX86RegNum(unsigned RegNo);
78 unsigned getStackAlignment() const { return StackAlign; }
80 /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
81 /// (created by TableGen) for target dependencies.
82 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
84 /// Code Generation virtual methods...
87 /// getMatchingSuperRegClass - Return a subclass of the specified register
88 /// class A so that each register in it has a sub-register of the
89 /// specified sub-register index which is in the specified register class B.
90 virtual const TargetRegisterClass *
91 getMatchingSuperRegClass(const TargetRegisterClass *A,
92 const TargetRegisterClass *B, unsigned Idx) const;
94 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
96 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
98 /// getCrossCopyRegClass - Returns a legal register class to copy a register
99 /// in the specified class to or from. Returns NULL if it is possible to copy
100 /// between a two registers of the specified class.
101 const TargetRegisterClass *
102 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
104 /// getCalleeSavedRegs - Return a null-terminated list of all of the
105 /// callee-save registers on this target.
106 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
108 /// getReservedRegs - Returns a bitset indexed by physical register number
109 /// indicating if a register is a special register that has particular uses and
110 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
111 /// register scavenger to determine what registers are free.
112 BitVector getReservedRegs(const MachineFunction &MF) const;
114 bool hasFP(const MachineFunction &MF) const;
116 bool canRealignStack(const MachineFunction &MF) const;
118 bool needsStackRealignment(const MachineFunction &MF) const;
120 bool hasReservedCallFrame(const MachineFunction &MF) const;
122 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
123 int &FrameIdx) const;
125 void eliminateCallFramePseudoInstr(MachineFunction &MF,
126 MachineBasicBlock &MBB,
127 MachineBasicBlock::iterator MI) const;
129 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
130 int SPAdj, RegScavenger *RS = NULL) const;
132 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
133 RegScavenger *RS = NULL) const;
135 void emitCalleeSavedFrameMoves(MachineFunction &MF, MCSymbol *Label,
136 unsigned FramePtr) const;
137 void emitPrologue(MachineFunction &MF) const;
138 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
140 // Debug information queries.
141 unsigned getRARegister() const;
142 unsigned getFrameRegister(const MachineFunction &MF) const;
143 int getFrameIndexOffset(const MachineFunction &MF, int FI) const;
144 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
146 // Exception handling queries.
147 unsigned getEHExceptionRegister() const;
148 unsigned getEHHandlerRegister() const;
151 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
152 // register of a specific X86 register.
153 // e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX
154 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
156 } // End llvm namespace