1 //===-- X86RegisterInfo.h - X86 Register Information Impl -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
15 #define LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "X86GenRegisterInfo.inc"
25 class X86RegisterInfo final : public X86GenRegisterInfo {
27 /// Is64Bit - Is the target 64-bits.
31 /// IsWin64 - Is the target on of win64 flavours
35 /// SlotSize - Stack slot size in bytes.
39 /// StackPtr - X86 physical register used as stack ptr.
43 /// FramePtr - X86 physical register used as frame ptr.
47 /// BasePtr - X86 physical register used as a base ptr in complex stack
48 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
49 /// variable size stack objects.
53 X86RegisterInfo(const Triple &TT);
55 // FIXME: This should be tablegen'd like getDwarfRegNum is
56 int getSEHRegNum(unsigned i) const;
58 /// Code Generation virtual methods...
60 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
62 /// getMatchingSuperRegClass - Return a subclass of the specified register
63 /// class A so that each register in it has a sub-register of the
64 /// specified sub-register index which is in the specified register class B.
65 const TargetRegisterClass *
66 getMatchingSuperRegClass(const TargetRegisterClass *A,
67 const TargetRegisterClass *B,
68 unsigned Idx) const override;
70 const TargetRegisterClass *
71 getSubClassWithSubReg(const TargetRegisterClass *RC,
72 unsigned Idx) const override;
74 const TargetRegisterClass *
75 getLargestLegalSuperClass(const TargetRegisterClass *RC,
76 const MachineFunction &MF) const override;
78 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
80 const TargetRegisterClass *
81 getPointerRegClass(const MachineFunction &MF,
82 unsigned Kind = 0) const override;
84 /// getCrossCopyRegClass - Returns a legal register class to copy a register
85 /// in the specified class to or from. Returns NULL if it is possible to copy
86 /// between a two registers of the specified class.
87 const TargetRegisterClass *
88 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
90 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
91 MachineFunction &MF) const override;
93 /// getCalleeSavedRegs - Return a null-terminated list of all of the
94 /// callee-save registers on this target.
96 getCalleeSavedRegs(const MachineFunction* MF) const override;
97 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
98 CallingConv::ID) const override;
99 const uint32_t *getNoPreservedMask() const;
101 /// getReservedRegs - Returns a bitset indexed by physical register number
102 /// indicating if a register is a special register that has particular uses and
103 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
104 /// register scavenger to determine what registers are free.
105 BitVector getReservedRegs(const MachineFunction &MF) const override;
107 bool hasBasePointer(const MachineFunction &MF) const;
109 bool canRealignStack(const MachineFunction &MF) const;
111 bool needsStackRealignment(const MachineFunction &MF) const override;
113 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
114 int &FrameIdx) const override;
116 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
117 int SPAdj, unsigned FIOperandNum,
118 RegScavenger *RS = nullptr) const override;
120 // Debug information queries.
121 unsigned getFrameRegister(const MachineFunction &MF) const override;
122 unsigned getPtrSizedFrameRegister(const MachineFunction &MF) const;
123 unsigned getStackRegister() const { return StackPtr; }
124 unsigned getBaseRegister() const { return BasePtr; }
125 // FIXME: Move to FrameInfok
126 unsigned getSlotSize() const { return SlotSize; }
129 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
130 // register of a specific X86 register.
131 // e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
132 unsigned getX86SubSuperRegister(unsigned, MVT::SimpleValueType, bool High=false);
134 //get512BitRegister - X86 utility - returns 512-bit super register
135 unsigned get512BitSuperRegister(unsigned Reg);
137 } // End llvm namespace