1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/Target/MRegisterInfo.h"
20 #include "X86GenRegisterInfo.h.inc"
24 class TargetInstrInfo;
25 class X86TargetMachine;
27 /// N86 namespace - Native X86 register numbers
31 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
35 class X86RegisterInfo : public X86GenRegisterInfo {
38 const TargetInstrInfo &TII;
41 /// Is64Bit - Is the target 64-bits.
45 /// SlotSize - Stack slot size in bytes.
49 /// StackPtr - X86 physical register used as stack ptr.
53 /// FramePtr - X86 physical register used as frame ptr.
57 /// RegOp2MemOpTable2Addr, RegOp2MemOpTable0, RegOp2MemOpTable1,
58 /// RegOp2MemOpTable2 - Load / store folding opcode maps.
60 DenseMap<unsigned*, unsigned> RegOp2MemOpTable2Addr;
61 DenseMap<unsigned*, unsigned> RegOp2MemOpTable0;
62 DenseMap<unsigned*, unsigned> RegOp2MemOpTable1;
63 DenseMap<unsigned*, unsigned> RegOp2MemOpTable2;
65 /// MemOp2RegOpTable - Load / store unfolding opcode map.
67 DenseMap<unsigned*, std::pair<unsigned, unsigned> > MemOp2RegOpTable;
70 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
72 /// getX86RegNum - Returns the native X86 register number for the given LLVM
73 /// register identifier.
74 unsigned getX86RegNum(unsigned RegNo);
76 /// Code Generation virtual methods...
78 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
79 MachineBasicBlock::iterator MI,
80 const std::vector<CalleeSavedInfo> &CSI) const;
82 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
83 MachineBasicBlock::iterator MI,
84 const std::vector<CalleeSavedInfo> &CSI) const;
86 void storeRegToStackSlot(MachineBasicBlock &MBB,
87 MachineBasicBlock::iterator MI,
88 unsigned SrcReg, int FrameIndex,
89 const TargetRegisterClass *RC) const;
91 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
92 SmallVector<MachineOperand,4> Addr,
93 const TargetRegisterClass *RC,
94 SmallVector<MachineInstr*,4> &NewMIs) const;
96 void loadRegFromStackSlot(MachineBasicBlock &MBB,
97 MachineBasicBlock::iterator MI,
98 unsigned DestReg, int FrameIndex,
99 const TargetRegisterClass *RC) const;
101 void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
102 SmallVector<MachineOperand,4> Addr,
103 const TargetRegisterClass *RC,
104 SmallVector<MachineInstr*,4> &NewMIs) const;
106 void copyRegToReg(MachineBasicBlock &MBB,
107 MachineBasicBlock::iterator MI,
108 unsigned DestReg, unsigned SrcReg,
109 const TargetRegisterClass *DestRC,
110 const TargetRegisterClass *SrcRC) const;
112 const TargetRegisterClass *
113 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
115 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
116 unsigned DestReg, const MachineInstr *Orig) const;
118 /// foldMemoryOperand - If this target supports it, fold a load or store of
119 /// the specified stack slot into the specified machine instruction for the
120 /// specified operand. If this is possible, the target should perform the
121 /// folding and return true, otherwise it should return false. If it folds
122 /// the instruction, it is likely that the MachineInstruction the iterator
123 /// references has been changed.
124 MachineInstr* foldMemoryOperand(MachineInstr* MI,
126 int FrameIndex) const;
128 /// foldMemoryOperand - Same as the previous version except it allows folding
129 /// of any load and store from / to any address, not just from a specific
131 MachineInstr* foldMemoryOperand(MachineInstr* MI,
133 MachineInstr* LoadMI) const;
135 /// unfoldMemoryOperand - Separate a single instruction which folded a load or a
136 /// a store or a load and a store into two or more instruction. If this is
137 /// possible, returns true as well as the new instructions by reference.
138 bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
140 SmallVector<MachineInstr*, 4> &NewMIs) const;
142 bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
143 SmallVector<SDNode*, 4> &NewNodes) const;
145 /// getCalleeSavedRegs - Return a null-terminated list of all of the
146 /// callee-save registers on this target.
147 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
149 /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
150 /// register classes to spill each callee-saved register with. The order and
151 /// length of this list match the getCalleeSavedRegs() list.
152 const TargetRegisterClass* const*
153 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
155 /// getReservedRegs - Returns a bitset indexed by physical register number
156 /// indicating if a register is a special register that has particular uses and
157 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
158 /// register scavenger to determine what registers are free.
159 BitVector getReservedRegs(const MachineFunction &MF) const;
161 bool hasFP(const MachineFunction &MF) const;
163 bool hasReservedCallFrame(MachineFunction &MF) const;
165 void eliminateCallFramePseudoInstr(MachineFunction &MF,
166 MachineBasicBlock &MBB,
167 MachineBasicBlock::iterator MI) const;
169 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
170 int SPAdj, RegScavenger *RS = NULL) const;
172 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
174 void emitPrologue(MachineFunction &MF) const;
175 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
177 // Debug information queries.
178 unsigned getRARegister() const;
179 unsigned getFrameRegister(MachineFunction &MF) const;
180 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
182 // Exception handling queries.
183 unsigned getEHExceptionRegister() const;
184 unsigned getEHHandlerRegister() const;
187 MachineInstr* foldMemoryOperand(MachineInstr* MI,
189 SmallVector<MachineOperand,4> &MOs) const;
192 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
193 // register of a specific X86 register.
194 // e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
195 unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
197 } // End llvm namespace