1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/Target/MRegisterInfo.h"
18 #include "X86GenRegisterInfo.h.inc"
22 class TargetInstrInfo;
23 class X86TargetMachine;
25 /// N86 namespace - Native X86 register numbers
29 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
33 class X86RegisterInfo : public X86GenRegisterInfo {
36 const TargetInstrInfo &TII;
39 /// Is64Bit - Is the target 64-bits.
42 /// SlotSize - Stack slot size in bytes.
45 /// StackPtr - X86 physical register used as stack ptr.
48 /// FramePtr - X86 physical register used as frame ptr.
52 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
54 /// getX86RegNum - Returns the native X86 register number for the given LLVM
55 /// register identifier.
56 unsigned getX86RegNum(unsigned RegNo);
58 /// Code Generation virtual methods...
59 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator MI,
61 const std::vector<CalleeSavedInfo> &CSI) const;
63 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
64 MachineBasicBlock::iterator MI,
65 const std::vector<CalleeSavedInfo> &CSI) const;
67 void storeRegToStackSlot(MachineBasicBlock &MBB,
68 MachineBasicBlock::iterator MI,
69 unsigned SrcReg, int FrameIndex,
70 const TargetRegisterClass *RC) const;
72 void loadRegFromStackSlot(MachineBasicBlock &MBB,
73 MachineBasicBlock::iterator MI,
74 unsigned DestReg, int FrameIndex,
75 const TargetRegisterClass *RC) const;
77 void copyRegToReg(MachineBasicBlock &MBB,
78 MachineBasicBlock::iterator MI,
79 unsigned DestReg, unsigned SrcReg,
80 const TargetRegisterClass *RC) const;
82 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
83 unsigned DestReg, const MachineInstr *Orig) const;
85 /// foldMemoryOperand - If this target supports it, fold a load or store of
86 /// the specified stack slot into the specified machine instruction for the
87 /// specified operand. If this is possible, the target should perform the
88 /// folding and return true, otherwise it should return false. If it folds
89 /// the instruction, it is likely that the MachineInstruction the iterator
90 /// references has been changed.
91 MachineInstr* foldMemoryOperand(MachineInstr* MI,
93 int FrameIndex) const;
95 /// getCalleeSavedRegs - Return a null-terminated list of all of the
96 /// callee-save registers on this target.
97 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
99 /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
100 /// register classes to spill each callee-saved register with. The order and
101 /// length of this list match the getCalleeSavedRegs() list.
102 const TargetRegisterClass* const*
103 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
105 /// getReservedRegs - Returns a bitset indexed by physical register number
106 /// indicating if a register is a special register that has particular uses and
107 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
108 /// register scavenger to determine what registers are free.
109 BitVector getReservedRegs(const MachineFunction &MF) const;
111 bool hasFP(const MachineFunction &MF) const;
113 bool hasReservedCallFrame(MachineFunction &MF) const;
115 void eliminateCallFramePseudoInstr(MachineFunction &MF,
116 MachineBasicBlock &MBB,
117 MachineBasicBlock::iterator MI) const;
119 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
120 int SPAdj, RegScavenger *RS = NULL) const;
122 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
124 void emitPrologue(MachineFunction &MF) const;
125 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
127 // Debug information queries.
128 unsigned getRARegister() const;
129 unsigned getFrameRegister(MachineFunction &MF) const;
130 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
132 // Exception handling queries.
133 unsigned getEHExceptionRegister() const;
134 unsigned getEHHandlerRegister() const;
137 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
138 // register of a specific X86 register.
139 // e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
140 unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
142 } // End llvm namespace