1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "X86GenRegisterInfo.h.inc"
23 class TargetInstrInfo;
24 class X86TargetMachine;
26 /// N86 namespace - Native X86 register numbers
30 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
34 class X86RegisterInfo : public X86GenRegisterInfo {
37 const TargetInstrInfo &TII;
40 /// Is64Bit - Is the target 64-bits.
43 /// SlotSize - Stack slot size in bytes.
46 /// StackPtr - X86 physical register used as stack ptr.
49 /// FramePtr - X86 physical register used as frame ptr.
53 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
55 /// getX86RegNum - Returns the native X86 register number for the given LLVM
56 /// register identifier.
57 unsigned getX86RegNum(unsigned RegNo);
59 /// Code Generation virtual methods...
60 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator MI,
62 const std::vector<CalleeSavedInfo> &CSI) const;
64 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
65 MachineBasicBlock::iterator MI,
66 const std::vector<CalleeSavedInfo> &CSI) const;
68 void storeRegToStackSlot(MachineBasicBlock &MBB,
69 MachineBasicBlock::iterator MI,
70 unsigned SrcReg, int FrameIndex,
71 const TargetRegisterClass *RC) const;
73 void loadRegFromStackSlot(MachineBasicBlock &MBB,
74 MachineBasicBlock::iterator MI,
75 unsigned DestReg, int FrameIndex,
76 const TargetRegisterClass *RC) const;
78 void copyRegToReg(MachineBasicBlock &MBB,
79 MachineBasicBlock::iterator MI,
80 unsigned DestReg, unsigned SrcReg,
81 const TargetRegisterClass *DestRC,
82 const TargetRegisterClass *SrcRC) const;
84 const TargetRegisterClass *
85 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
87 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
88 unsigned DestReg, const MachineInstr *Orig) const;
90 /// foldMemoryOperand - If this target supports it, fold a load or store of
91 /// the specified stack slot into the specified machine instruction for the
92 /// specified operand. If this is possible, the target should perform the
93 /// folding and return true, otherwise it should return false. If it folds
94 /// the instruction, it is likely that the MachineInstruction the iterator
95 /// references has been changed.
96 MachineInstr* foldMemoryOperand(MachineInstr* MI,
98 int FrameIndex) const;
100 /// foldMemoryOperand - Same as the previous version except it allows folding
101 /// of any load and store from / to any address, not just from a specific
103 MachineInstr* foldMemoryOperand(MachineInstr* MI,
105 MachineInstr* LoadMI) const;
107 /// getCalleeSavedRegs - Return a null-terminated list of all of the
108 /// callee-save registers on this target.
109 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
111 /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
112 /// register classes to spill each callee-saved register with. The order and
113 /// length of this list match the getCalleeSavedRegs() list.
114 const TargetRegisterClass* const*
115 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
117 /// getReservedRegs - Returns a bitset indexed by physical register number
118 /// indicating if a register is a special register that has particular uses and
119 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
120 /// register scavenger to determine what registers are free.
121 BitVector getReservedRegs(const MachineFunction &MF) const;
123 bool hasFP(const MachineFunction &MF) const;
125 bool hasReservedCallFrame(MachineFunction &MF) const;
127 void eliminateCallFramePseudoInstr(MachineFunction &MF,
128 MachineBasicBlock &MBB,
129 MachineBasicBlock::iterator MI) const;
131 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
132 int SPAdj, RegScavenger *RS = NULL) const;
134 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
136 void emitPrologue(MachineFunction &MF) const;
137 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
139 // Debug information queries.
140 unsigned getRARegister() const;
141 unsigned getFrameRegister(MachineFunction &MF) const;
142 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
144 // Exception handling queries.
145 unsigned getEHExceptionRegister() const;
146 unsigned getEHHandlerRegister() const;
149 MachineInstr* foldMemoryOperand(MachineInstr* MI,
151 SmallVector<MachineOperand,4> &MOs) const;
154 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
155 // register of a specific X86 register.
156 // e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
157 unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
159 } // End llvm namespace