1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86SelectionDAGInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "x86-selectiondag-info"
15 #include "X86TargetMachine.h"
16 #include "llvm/CodeGen/SelectionDAG.h"
17 #include "llvm/IR/DerivedTypes.h"
20 X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) :
21 TargetSelectionDAGInfo(TM),
22 Subtarget(&TM.getSubtarget<X86Subtarget>()),
23 TLI(*TM.getTargetLowering()) {
26 X86SelectionDAGInfo::~X86SelectionDAGInfo() {
30 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
32 SDValue Dst, SDValue Src,
33 SDValue Size, unsigned Align,
35 MachinePointerInfo DstPtrInfo) const {
36 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
38 // If to a segment-relative address space, use the default lowering.
39 if (DstPtrInfo.getAddrSpace() >= 256)
42 // If not DWORD aligned or size is more than the threshold, call the library.
43 // The libc version is likely to be faster for these cases. It can use the
44 // address value and run time information about the CPU.
45 if ((Align & 3) != 0 ||
47 ConstantSize->getZExtValue() >
48 Subtarget->getMaxInlineSizeThreshold()) {
49 // Check to see if there is a specialized entry-point for memory zeroing.
50 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
52 if (const char *bzeroEntry = V &&
53 V->isNullValue() ? Subtarget->getBZeroEntry() : 0) {
54 EVT IntPtr = TLI.getPointerTy();
55 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
56 TargetLowering::ArgListTy Args;
57 TargetLowering::ArgListEntry Entry;
60 Args.push_back(Entry);
62 Args.push_back(Entry);
64 CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()),
65 false, false, false, false,
66 0, CallingConv::C, /*isTailCall=*/false,
67 /*doesNotRet=*/false, /*isReturnValueUsed=*/false,
68 DAG.getExternalSymbol(bzeroEntry, IntPtr), Args,
70 std::pair<SDValue,SDValue> CallResult =
72 return CallResult.second;
75 // Otherwise have the target-independent code call memset.
79 uint64_t SizeVal = ConstantSize->getZExtValue();
83 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
84 unsigned BytesLeft = 0;
85 bool TwoRepStos = false;
88 uint64_t Val = ValC->getZExtValue() & 255;
90 // If the value is a constant, then we can potentially use larger sets.
92 case 2: // WORD aligned
95 Val = (Val << 8) | Val;
97 case 0: // DWORD aligned
100 Val = (Val << 8) | Val;
101 Val = (Val << 16) | Val;
102 if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
105 Val = (Val << 32) | Val;
108 default: // Byte aligned
111 Count = DAG.getIntPtrConstant(SizeVal);
115 if (AVT.bitsGT(MVT::i8)) {
116 unsigned UBytes = AVT.getSizeInBits() / 8;
117 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
118 BytesLeft = SizeVal % UBytes;
121 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
123 InFlag = Chain.getValue(1);
126 Count = DAG.getIntPtrConstant(SizeVal);
127 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
128 InFlag = Chain.getValue(1);
131 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
134 InFlag = Chain.getValue(1);
135 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
138 InFlag = Chain.getValue(1);
140 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
141 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
142 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
145 InFlag = Chain.getValue(1);
147 EVT CVT = Count.getValueType();
148 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
149 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
150 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
153 InFlag = Chain.getValue(1);
154 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
155 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
156 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
157 } else if (BytesLeft) {
158 // Handle the last 1 - 7 bytes.
159 unsigned Offset = SizeVal - BytesLeft;
160 EVT AddrVT = Dst.getValueType();
161 EVT SizeVT = Size.getValueType();
163 Chain = DAG.getMemset(Chain, dl,
164 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
165 DAG.getConstant(Offset, AddrVT)),
167 DAG.getConstant(BytesLeft, SizeVT),
168 Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
171 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
176 X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
177 SDValue Chain, SDValue Dst, SDValue Src,
178 SDValue Size, unsigned Align,
179 bool isVolatile, bool AlwaysInline,
180 MachinePointerInfo DstPtrInfo,
181 MachinePointerInfo SrcPtrInfo) const {
182 // This requires the copy size to be a constant, preferably
183 // within a subtarget-specific limit.
184 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
187 uint64_t SizeVal = ConstantSize->getZExtValue();
188 if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold())
191 /// If not DWORD aligned, it is more efficient to call the library. However
192 /// if calling the library is not allowed (AlwaysInline), then soldier on as
193 /// the code generated here is better than the long load-store sequence we
194 /// would otherwise get.
195 if (!AlwaysInline && (Align & 3) != 0)
198 // If to a segment-relative address space, use the default lowering.
199 if (DstPtrInfo.getAddrSpace() >= 256 ||
200 SrcPtrInfo.getAddrSpace() >= 256)
203 // If ESI is used as a base pointer, we must preserve it when doing rep movs.
204 const X86RegisterInfo *TRI =
205 static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
206 bool PreserveESI = TRI->hasBasePointer(DAG.getMachineFunction()) &&
207 TRI->getBaseRegister() == X86::ESI;
219 AVT = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
221 unsigned UBytes = AVT.getSizeInBits() / 8;
222 unsigned CountVal = SizeVal / UBytes;
223 SDValue Count = DAG.getIntPtrConstant(CountVal);
224 unsigned BytesLeft = SizeVal % UBytes;
228 // Save ESI to a physical register. (We cannot use a virtual register
229 // because if it is spilled we wouldn't be able to reload it.)
230 // We don't glue this because the register dependencies are explicit.
231 Chain = DAG.getCopyToReg(Chain, dl, X86::EDX,
232 DAG.getRegister(X86::ESI, MVT::i32));
235 SDValue InGlue(0, 0);
236 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
239 InGlue = Chain.getValue(1);
240 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
243 InGlue = Chain.getValue(1);
244 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI :
247 InGlue = Chain.getValue(1);
249 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
250 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InGlue };
251 // FIXME: Make X86rep_movs explicitly use FCX, RDI, RSI instead of glue.
252 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops,
253 array_lengthof(Ops));
256 InGlue = RepMovs.getValue(1);
257 RepMovs = DAG.getCopyToReg(RepMovs, dl, X86::ESI,
258 DAG.getRegister(X86::EDX, MVT::i32), InGlue);
261 SmallVector<SDValue, 4> Results;
262 Results.push_back(RepMovs);
266 // Handle the last 1 - 7 bytes.
267 unsigned Offset = SizeVal - BytesLeft;
268 EVT DstVT = Dst.getValueType();
269 EVT SrcVT = Src.getValueType();
270 EVT SizeVT = Size.getValueType();
271 Results.push_back(DAG.getMemcpy(Chain, dl,
272 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
273 DAG.getConstant(Offset, DstVT)),
274 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
275 DAG.getConstant(Offset, SrcVT)),
276 DAG.getConstant(BytesLeft, SizeVT),
277 Align, isVolatile, AlwaysInline,
278 DstPtrInfo.getWithOffset(Offset),
279 SrcPtrInfo.getWithOffset(Offset)));
282 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
283 &Results[0], Results.size());