1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86SelectionDAGInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
25 #define DEBUG_TYPE "x86-selectiondag-info"
27 X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
28 : TargetSelectionDAGInfo(&DL) {}
30 X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
32 bool X86SelectionDAGInfo::isBaseRegConflictPossible(
33 SelectionDAG &DAG, ArrayRef<unsigned> ClobberSet) const {
34 // We cannot use TRI->hasBasePointer() until *after* we select all basic
35 // blocks. Legalization may introduce new stack temporaries with large
36 // alignment requirements. Fall back to generic code if there are any
37 // dynamic stack adjustments (hopefully rare) and the base pointer would
38 // conflict if we had to use it.
39 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
40 if (!MFI->hasVarSizedObjects() && !MFI->hasInlineAsmWithSPAdjust())
43 const X86RegisterInfo *TRI = static_cast<const X86RegisterInfo *>(
44 DAG.getSubtarget().getRegisterInfo());
45 unsigned BaseReg = TRI->getBaseRegister();
46 for (unsigned R : ClobberSet)
53 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
55 SDValue Dst, SDValue Src,
56 SDValue Size, unsigned Align,
58 MachinePointerInfo DstPtrInfo) const {
59 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
60 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
63 // If the base register might conflict with our physical registers, bail out.
64 unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
65 X86::ECX, X86::EAX, X86::EDI};
66 assert(!isBaseRegConflictPossible(DAG, ClobberSet));
69 // If to a segment-relative address space, use the default lowering.
70 if (DstPtrInfo.getAddrSpace() >= 256)
73 // If not DWORD aligned or size is more than the threshold, call the library.
74 // The libc version is likely to be faster for these cases. It can use the
75 // address value and run time information about the CPU.
76 if ((Align & 3) != 0 || !ConstantSize ||
77 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
78 // Check to see if there is a specialized entry-point for memory zeroing.
79 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
81 if (const char *bzeroEntry = V &&
82 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
83 EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
84 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
85 TargetLowering::ArgListTy Args;
86 TargetLowering::ArgListEntry Entry;
89 Args.push_back(Entry);
91 Args.push_back(Entry);
93 TargetLowering::CallLoweringInfo CLI(DAG);
94 CLI.setDebugLoc(dl).setChain(Chain)
95 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
96 DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
100 std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
101 return CallResult.second;
104 // Otherwise have the target-independent code call memset.
108 uint64_t SizeVal = ConstantSize->getZExtValue();
112 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
113 unsigned BytesLeft = 0;
114 bool TwoRepStos = false;
117 uint64_t Val = ValC->getZExtValue() & 255;
119 // If the value is a constant, then we can potentially use larger sets.
121 case 2: // WORD aligned
124 Val = (Val << 8) | Val;
126 case 0: // DWORD aligned
129 Val = (Val << 8) | Val;
130 Val = (Val << 16) | Val;
131 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
134 Val = (Val << 32) | Val;
137 default: // Byte aligned
140 Count = DAG.getIntPtrConstant(SizeVal);
144 if (AVT.bitsGT(MVT::i8)) {
145 unsigned UBytes = AVT.getSizeInBits() / 8;
146 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
147 BytesLeft = SizeVal % UBytes;
150 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
152 InFlag = Chain.getValue(1);
155 Count = DAG.getIntPtrConstant(SizeVal);
156 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
157 InFlag = Chain.getValue(1);
160 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
162 InFlag = Chain.getValue(1);
163 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
165 InFlag = Chain.getValue(1);
167 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
168 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
169 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
172 InFlag = Chain.getValue(1);
174 EVT CVT = Count.getValueType();
175 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
176 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
177 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
180 InFlag = Chain.getValue(1);
181 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
182 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
183 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
184 } else if (BytesLeft) {
185 // Handle the last 1 - 7 bytes.
186 unsigned Offset = SizeVal - BytesLeft;
187 EVT AddrVT = Dst.getValueType();
188 EVT SizeVT = Size.getValueType();
190 Chain = DAG.getMemset(Chain, dl,
191 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
192 DAG.getConstant(Offset, AddrVT)),
194 DAG.getConstant(BytesLeft, SizeVT),
195 Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
198 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
203 X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
204 SDValue Chain, SDValue Dst, SDValue Src,
205 SDValue Size, unsigned Align,
206 bool isVolatile, bool AlwaysInline,
207 MachinePointerInfo DstPtrInfo,
208 MachinePointerInfo SrcPtrInfo) const {
209 // This requires the copy size to be a constant, preferably
210 // within a subtarget-specific limit.
211 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
212 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
215 uint64_t SizeVal = ConstantSize->getZExtValue();
216 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
219 /// If not DWORD aligned, it is more efficient to call the library. However
220 /// if calling the library is not allowed (AlwaysInline), then soldier on as
221 /// the code generated here is better than the long load-store sequence we
222 /// would otherwise get.
223 if (!AlwaysInline && (Align & 3) != 0)
226 // If to a segment-relative address space, use the default lowering.
227 if (DstPtrInfo.getAddrSpace() >= 256 ||
228 SrcPtrInfo.getAddrSpace() >= 256)
231 // If the base register might conflict with our physical registers, bail out.
232 unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI,
233 X86::ECX, X86::ESI, X86::EDI};
234 if (isBaseRegConflictPossible(DAG, ClobberSet))
247 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
249 unsigned UBytes = AVT.getSizeInBits() / 8;
250 unsigned CountVal = SizeVal / UBytes;
251 SDValue Count = DAG.getIntPtrConstant(CountVal);
252 unsigned BytesLeft = SizeVal % UBytes;
255 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
258 InFlag = Chain.getValue(1);
259 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
262 InFlag = Chain.getValue(1);
263 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
266 InFlag = Chain.getValue(1);
268 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
269 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
270 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
272 SmallVector<SDValue, 4> Results;
273 Results.push_back(RepMovs);
275 // Handle the last 1 - 7 bytes.
276 unsigned Offset = SizeVal - BytesLeft;
277 EVT DstVT = Dst.getValueType();
278 EVT SrcVT = Src.getValueType();
279 EVT SizeVT = Size.getValueType();
280 Results.push_back(DAG.getMemcpy(Chain, dl,
281 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
282 DAG.getConstant(Offset, DstVT)),
283 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
284 DAG.getConstant(Offset, SrcVT)),
285 DAG.getConstant(BytesLeft, SizeVT),
286 Align, isVolatile, AlwaysInline,
287 DstPtrInfo.getWithOffset(Offset),
288 SrcPtrInfo.getWithOffset(Offset)));
291 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);