1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86SelectionDAGInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
25 #define DEBUG_TYPE "x86-selectiondag-info"
27 X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
28 : TargetSelectionDAGInfo(&DL) {}
30 X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
33 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
35 SDValue Dst, SDValue Src,
36 SDValue Size, unsigned Align,
38 MachinePointerInfo DstPtrInfo) const {
39 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
40 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
42 // If to a segment-relative address space, use the default lowering.
43 if (DstPtrInfo.getAddrSpace() >= 256)
46 // If not DWORD aligned or size is more than the threshold, call the library.
47 // The libc version is likely to be faster for these cases. It can use the
48 // address value and run time information about the CPU.
49 if ((Align & 3) != 0 || !ConstantSize ||
50 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
51 // Check to see if there is a specialized entry-point for memory zeroing.
52 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
54 if (const char *bzeroEntry = V &&
55 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
56 EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
57 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
58 TargetLowering::ArgListTy Args;
59 TargetLowering::ArgListEntry Entry;
62 Args.push_back(Entry);
64 Args.push_back(Entry);
66 TargetLowering::CallLoweringInfo CLI(DAG);
67 CLI.setDebugLoc(dl).setChain(Chain)
68 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
69 DAG.getExternalSymbol(bzeroEntry, IntPtr), &Args, 0)
72 std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
73 return CallResult.second;
76 // Otherwise have the target-independent code call memset.
80 uint64_t SizeVal = ConstantSize->getZExtValue();
84 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
85 unsigned BytesLeft = 0;
86 bool TwoRepStos = false;
89 uint64_t Val = ValC->getZExtValue() & 255;
91 // If the value is a constant, then we can potentially use larger sets.
93 case 2: // WORD aligned
96 Val = (Val << 8) | Val;
98 case 0: // DWORD aligned
101 Val = (Val << 8) | Val;
102 Val = (Val << 16) | Val;
103 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
106 Val = (Val << 32) | Val;
109 default: // Byte aligned
112 Count = DAG.getIntPtrConstant(SizeVal);
116 if (AVT.bitsGT(MVT::i8)) {
117 unsigned UBytes = AVT.getSizeInBits() / 8;
118 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
119 BytesLeft = SizeVal % UBytes;
122 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
124 InFlag = Chain.getValue(1);
127 Count = DAG.getIntPtrConstant(SizeVal);
128 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
129 InFlag = Chain.getValue(1);
132 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
134 InFlag = Chain.getValue(1);
135 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
137 InFlag = Chain.getValue(1);
139 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
140 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
141 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
144 InFlag = Chain.getValue(1);
146 EVT CVT = Count.getValueType();
147 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
148 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
149 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
152 InFlag = Chain.getValue(1);
153 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
154 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
155 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
156 } else if (BytesLeft) {
157 // Handle the last 1 - 7 bytes.
158 unsigned Offset = SizeVal - BytesLeft;
159 EVT AddrVT = Dst.getValueType();
160 EVT SizeVT = Size.getValueType();
162 Chain = DAG.getMemset(Chain, dl,
163 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
164 DAG.getConstant(Offset, AddrVT)),
166 DAG.getConstant(BytesLeft, SizeVT),
167 Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
170 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
175 X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
176 SDValue Chain, SDValue Dst, SDValue Src,
177 SDValue Size, unsigned Align,
178 bool isVolatile, bool AlwaysInline,
179 MachinePointerInfo DstPtrInfo,
180 MachinePointerInfo SrcPtrInfo) const {
181 // This requires the copy size to be a constant, preferably
182 // within a subtarget-specific limit.
183 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
184 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
187 uint64_t SizeVal = ConstantSize->getZExtValue();
188 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
191 /// If not DWORD aligned, it is more efficient to call the library. However
192 /// if calling the library is not allowed (AlwaysInline), then soldier on as
193 /// the code generated here is better than the long load-store sequence we
194 /// would otherwise get.
195 if (!AlwaysInline && (Align & 3) != 0)
198 // If to a segment-relative address space, use the default lowering.
199 if (DstPtrInfo.getAddrSpace() >= 256 ||
200 SrcPtrInfo.getAddrSpace() >= 256)
203 // ESI might be used as a base pointer, in that case we can't simply overwrite
204 // the register. Fall back to generic code.
205 const X86RegisterInfo *TRI =
206 static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
207 if (TRI->hasBasePointer(DAG.getMachineFunction()) &&
208 TRI->getBaseRegister() == X86::ESI)
221 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
223 unsigned UBytes = AVT.getSizeInBits() / 8;
224 unsigned CountVal = SizeVal / UBytes;
225 SDValue Count = DAG.getIntPtrConstant(CountVal);
226 unsigned BytesLeft = SizeVal % UBytes;
229 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
232 InFlag = Chain.getValue(1);
233 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
236 InFlag = Chain.getValue(1);
237 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
240 InFlag = Chain.getValue(1);
242 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
243 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
244 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
246 SmallVector<SDValue, 4> Results;
247 Results.push_back(RepMovs);
249 // Handle the last 1 - 7 bytes.
250 unsigned Offset = SizeVal - BytesLeft;
251 EVT DstVT = Dst.getValueType();
252 EVT SrcVT = Src.getValueType();
253 EVT SizeVT = Size.getValueType();
254 Results.push_back(DAG.getMemcpy(Chain, dl,
255 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
256 DAG.getConstant(Offset, DstVT)),
257 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
258 DAG.getConstant(Offset, SrcVT)),
259 DAG.getConstant(BytesLeft, SizeVT),
260 Align, isVolatile, AlwaysInline,
261 DstPtrInfo.getWithOffset(Offset),
262 SrcPtrInfo.getWithOffset(Offset)));
265 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);