1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86SelectionDAGInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
25 #define DEBUG_TYPE "x86-selectiondag-info"
27 bool X86SelectionDAGInfo::isBaseRegConflictPossible(
28 SelectionDAG &DAG, ArrayRef<unsigned> ClobberSet) const {
29 // We cannot use TRI->hasBasePointer() until *after* we select all basic
30 // blocks. Legalization may introduce new stack temporaries with large
31 // alignment requirements. Fall back to generic code if there are any
32 // dynamic stack adjustments (hopefully rare) and the base pointer would
33 // conflict if we had to use it.
34 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
35 if (!MFI->hasVarSizedObjects() && !MFI->hasOpaqueSPAdjustment())
38 const X86RegisterInfo *TRI = static_cast<const X86RegisterInfo *>(
39 DAG.getSubtarget().getRegisterInfo());
40 unsigned BaseReg = TRI->getBaseRegister();
41 for (unsigned R : ClobberSet)
48 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
50 SDValue Dst, SDValue Src,
51 SDValue Size, unsigned Align,
53 MachinePointerInfo DstPtrInfo) const {
54 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
55 const X86Subtarget &Subtarget =
56 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
59 // If the base register might conflict with our physical registers, bail out.
60 const unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
61 X86::ECX, X86::EAX, X86::EDI};
62 assert(!isBaseRegConflictPossible(DAG, ClobberSet));
65 // If to a segment-relative address space, use the default lowering.
66 if (DstPtrInfo.getAddrSpace() >= 256)
69 // If not DWORD aligned or size is more than the threshold, call the library.
70 // The libc version is likely to be faster for these cases. It can use the
71 // address value and run time information about the CPU.
72 if ((Align & 3) != 0 || !ConstantSize ||
73 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
74 // Check to see if there is a specialized entry-point for memory zeroing.
75 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
77 if (const char *bzeroEntry = V &&
78 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
80 DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout());
81 Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
82 TargetLowering::ArgListTy Args;
83 TargetLowering::ArgListEntry Entry;
86 Args.push_back(Entry);
88 Args.push_back(Entry);
90 TargetLowering::CallLoweringInfo CLI(DAG);
91 CLI.setDebugLoc(dl).setChain(Chain)
92 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
93 DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
97 std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
98 return CallResult.second;
101 // Otherwise have the target-independent code call memset.
105 uint64_t SizeVal = ConstantSize->getZExtValue();
109 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
110 unsigned BytesLeft = 0;
111 bool TwoRepStos = false;
114 uint64_t Val = ValC->getZExtValue() & 255;
116 // If the value is a constant, then we can potentially use larger sets.
118 case 2: // WORD aligned
121 Val = (Val << 8) | Val;
123 case 0: // DWORD aligned
126 Val = (Val << 8) | Val;
127 Val = (Val << 16) | Val;
128 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
131 Val = (Val << 32) | Val;
134 default: // Byte aligned
137 Count = DAG.getIntPtrConstant(SizeVal, dl);
141 if (AVT.bitsGT(MVT::i8)) {
142 unsigned UBytes = AVT.getSizeInBits() / 8;
143 Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl);
144 BytesLeft = SizeVal % UBytes;
147 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT),
149 InFlag = Chain.getValue(1);
152 Count = DAG.getIntPtrConstant(SizeVal, dl);
153 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
154 InFlag = Chain.getValue(1);
157 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
159 InFlag = Chain.getValue(1);
160 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
162 InFlag = Chain.getValue(1);
164 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
165 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
166 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
169 InFlag = Chain.getValue(1);
171 EVT CVT = Count.getValueType();
172 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
173 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, dl,
175 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
178 InFlag = Chain.getValue(1);
179 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
180 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
181 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
182 } else if (BytesLeft) {
183 // Handle the last 1 - 7 bytes.
184 unsigned Offset = SizeVal - BytesLeft;
185 EVT AddrVT = Dst.getValueType();
186 EVT SizeVT = Size.getValueType();
188 Chain = DAG.getMemset(Chain, dl,
189 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
190 DAG.getConstant(Offset, dl, AddrVT)),
192 DAG.getConstant(BytesLeft, dl, SizeVT),
193 Align, isVolatile, false,
194 DstPtrInfo.getWithOffset(Offset));
197 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
201 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy(
202 SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
203 SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline,
204 MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
205 // This requires the copy size to be a constant, preferably
206 // within a subtarget-specific limit.
207 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
208 const X86Subtarget &Subtarget =
209 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
212 uint64_t SizeVal = ConstantSize->getZExtValue();
213 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
216 /// If not DWORD aligned, it is more efficient to call the library. However
217 /// if calling the library is not allowed (AlwaysInline), then soldier on as
218 /// the code generated here is better than the long load-store sequence we
219 /// would otherwise get.
220 if (!AlwaysInline && (Align & 3) != 0)
223 // If to a segment-relative address space, use the default lowering.
224 if (DstPtrInfo.getAddrSpace() >= 256 ||
225 SrcPtrInfo.getAddrSpace() >= 256)
228 // If the base register might conflict with our physical registers, bail out.
229 const unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI,
230 X86::ECX, X86::ESI, X86::EDI};
231 if (isBaseRegConflictPossible(DAG, ClobberSet))
244 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
246 unsigned UBytes = AVT.getSizeInBits() / 8;
247 unsigned CountVal = SizeVal / UBytes;
248 SDValue Count = DAG.getIntPtrConstant(CountVal, dl);
249 unsigned BytesLeft = SizeVal % UBytes;
252 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
255 InFlag = Chain.getValue(1);
256 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
259 InFlag = Chain.getValue(1);
260 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
263 InFlag = Chain.getValue(1);
265 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
266 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
267 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
269 SmallVector<SDValue, 4> Results;
270 Results.push_back(RepMovs);
272 // Handle the last 1 - 7 bytes.
273 unsigned Offset = SizeVal - BytesLeft;
274 EVT DstVT = Dst.getValueType();
275 EVT SrcVT = Src.getValueType();
276 EVT SizeVT = Size.getValueType();
277 Results.push_back(DAG.getMemcpy(Chain, dl,
278 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
279 DAG.getConstant(Offset, dl,
281 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
282 DAG.getConstant(Offset, dl,
284 DAG.getConstant(BytesLeft, dl, SizeVT),
285 Align, isVolatile, AlwaysInline, false,
286 DstPtrInfo.getWithOffset(Offset),
287 SrcPtrInfo.getWithOffset(Offset)));
290 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);