1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Begeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "X86Subtarget.h"
15 #include "X86GenSubtarget.inc"
16 #include "llvm/Module.h"
17 #include "llvm/Support/CommandLine.h"
18 #include "llvm/Target/TargetMachine.h"
21 cl::opt<X86Subtarget::AsmWriterFlavorTy>
22 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
23 cl::desc("Choose style of code to emit from X86 backend:"),
25 clEnumValN(X86Subtarget::ATT, "att", " Emit AT&T-style assembly"),
26 clEnumValN(X86Subtarget::Intel, "intel", " Emit Intel-style assembly"),
30 /// True if accessing the GV requires an extra load. For Windows, dllimported
31 /// symbols are indirect, loading the value at address GV rather then the
32 /// value of GV itself. This means that the GlobalAddress must be in the base
33 /// or index register of the address, not the GV offset field.
34 bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
35 const TargetMachine& TM,
36 bool isDirectCall) const
39 if (TM.getRelocationModel() != Reloc::Static)
40 if (isTargetDarwin()) {
41 return (!isDirectCall &&
42 (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
43 (GV->isDeclaration() && !GV->hasNotBeenReadFromBytecode())));
44 } else if (TM.getRelocationModel() == Reloc::PIC_ && isPICStyleGOT()) {
45 // Extra load is needed for all non-statics.
46 return (!isDirectCall &&
47 (GV->isDeclaration() || !GV->hasInternalLinkage()));
48 } else if (isTargetCygMing() || isTargetWindows()) {
49 return (GV->hasDLLImportLinkage());
55 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
56 /// specified arguments. If we can't run cpuid on the host, return true.
57 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
58 unsigned *rECX, unsigned *rEDX) {
59 #if defined(__x86_64__)
60 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
61 asm ("movq\t%%rbx, %%rsi\n\t"
63 "xchgq\t%%rbx, %%rsi\n\t"
70 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
72 asm ("movl\t%%ebx, %%esi\n\t"
74 "xchgl\t%%ebx, %%esi\n\t"
81 #elif defined(_MSC_VER)
86 mov dword ptr [esi],eax
88 mov dword ptr [esi],ebx
90 mov dword ptr [esi],ecx
92 mov dword ptr [esi],edx
100 void X86Subtarget::AutoDetectSubtargetFeatures() {
101 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
107 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
110 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
112 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
113 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
114 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
115 if (ECX & 0x1) X86SSELevel = SSE3;
116 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
118 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
119 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
120 HasX86_64 = (EDX >> 29) & 0x1;
121 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
122 // FIXME: Correctly check for 64-bit stuff
126 static const char *GetCurrentX86CPU() {
127 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
128 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
130 unsigned Family = (EAX >> 8) & 0xf; // Bits 8 - 11
131 unsigned Model = (EAX >> 4) & 0xf; // Bits 4 - 7
132 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
133 bool Em64T = (EDX >> 29) & 0x1;
140 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
141 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
149 case 4: return "pentium-mmx";
150 default: return "pentium";
154 case 1: return "pentiumpro";
157 case 6: return "pentium2";
161 case 11: return "pentium3";
163 case 13: return "pentium-m";
164 case 14: return "yonah";
165 case 15: return "core2";
166 default: return "i686";
172 return (Em64T) ? "nocona" : "prescott";
174 return (Em64T) ? "x86-64" : "pentium4";
181 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
182 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
183 // appears to be no way to generate the wide variety of AMD-specific targets
184 // from the information returned from CPUID.
192 case 8: return "k6-2";
194 case 13: return "k6-3";
195 default: return "pentium";
199 case 4: return "athlon-tbird";
202 case 8: return "athlon-mp";
203 case 10: return "athlon-xp";
204 default: return "athlon";
208 case 1: return "opteron";
209 case 5: return "athlon-fx"; // also opteron
210 default: return "athlon64";
220 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
221 : AsmFlavor(AsmWriterFlavor)
222 , PICStyle(PICStyle::None)
223 , X86SSELevel(NoMMXSSE)
226 // FIXME: this is a known good value for Yonah. How about others?
227 , MinRepStrSizeThreshold(128)
229 , TargetType(isELF) { // Default to ELF unless otherwise specified.
231 // Determine default and user specified characteristics
233 // If feature string is not empty, parse features string.
234 std::string CPU = GetCurrentX86CPU();
235 ParseSubtargetFeatures(FS, CPU);
237 if (Is64Bit && !HasX86_64)
238 cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
240 if (Is64Bit && X86SSELevel < SSE2)
241 cerr << "Warning: 64-bit processors all have at least SSE2.\n";
243 // Otherwise, use CPUID to auto-detect feature set.
244 AutoDetectSubtargetFeatures();
247 // If requesting codegen for X86-64, make sure that 64-bit and SSE2 features
248 // are enabled. These are available on all x86-64 CPUs.
251 if (X86SSELevel < SSE2)
255 // Set the boolean corresponding to the current target triple, or the default
256 // if one cannot be determined, to true.
257 const std::string& TT = M.getTargetTriple();
258 if (TT.length() > 5) {
259 if (TT.find("cygwin") != std::string::npos)
260 TargetType = isCygwin;
261 else if (TT.find("mingw") != std::string::npos)
262 TargetType = isMingw;
263 else if (TT.find("darwin") != std::string::npos)
264 TargetType = isDarwin;
265 else if (TT.find("win32") != std::string::npos)
266 TargetType = isWindows;
267 } else if (TT.empty()) {
268 #if defined(__CYGWIN__)
269 TargetType = isCygwin;
270 #elif defined(__MINGW32__)
271 TargetType = isMingw;
272 #elif defined(__APPLE__)
273 TargetType = isDarwin;
274 #elif defined(_WIN32)
275 TargetType = isWindows;
279 // If the asm syntax hasn't been overridden on the command line, use whatever
281 if (AsmFlavor == X86Subtarget::Unset) {
282 if (TargetType == isWindows) {
283 AsmFlavor = X86Subtarget::Intel;
285 AsmFlavor = X86Subtarget::ATT;
289 if (TargetType == isDarwin ||
290 TargetType == isCygwin ||
291 TargetType == isMingw ||
292 (TargetType == isELF && Is64Bit))