1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "X86Subtarget.h"
15 #include "X86GenSubtarget.inc"
16 #include "llvm/Module.h"
17 #include "llvm/Support/CommandLine.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "llvm/Target/TargetOptions.h"
22 static cl::opt<X86Subtarget::AsmWriterFlavorTy>
23 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
24 cl::desc("Choose style of code to emit from X86 backend:"),
26 clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
27 clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
31 /// True if accessing the GV requires an extra load. For Windows, dllimported
32 /// symbols are indirect, loading the value at address GV rather then the
33 /// value of GV itself. This means that the GlobalAddress must be in the base
34 /// or index register of the address, not the GV offset field.
35 bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
36 const TargetMachine& TM,
37 bool isDirectCall) const
40 if (TM.getRelocationModel() != Reloc::Static &&
41 TM.getCodeModel() != CodeModel::Large) {
42 if (isTargetDarwin()) {
45 bool isDecl = GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode();
46 if (GV->hasHiddenVisibility() &&
47 (Is64Bit || (!isDecl && !GV->hasCommonLinkage())))
48 // If symbol visibility is hidden, the extra load is not needed if
49 // target is x86-64 or the symbol is definitely defined in the current
52 return !isDirectCall && (isDecl || GV->mayBeOverridden());
53 } else if (isTargetELF()) {
54 // Extra load is needed for all externally visible.
57 if (GV->hasInternalLinkage() || GV->hasHiddenVisibility())
60 } else if (isTargetCygMing() || isTargetWindows()) {
61 return (GV->hasDLLImportLinkage());
67 /// True if accessing the GV requires a register. This is a superset of the
68 /// cases where GVRequiresExtraLoad is true. Some variations of PIC require
69 /// a register, but not an extra load.
70 bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
71 const TargetMachine& TM,
72 bool isDirectCall) const
74 if (GVRequiresExtraLoad(GV, TM, isDirectCall))
76 // Code below here need only consider cases where GVRequiresExtraLoad
78 if (TM.getRelocationModel() == Reloc::PIC_)
79 return !isDirectCall &&
80 (GV->hasInternalLinkage() || GV->hasExternalLinkage());
84 /// getBZeroEntry - This function returns the name of a function which has an
85 /// interface like the non-standard bzero function, if such a function exists on
86 /// the current subtarget and it is considered prefereable over memset with zero
87 /// passed as the second argument. Otherwise it returns null.
88 const char *X86Subtarget::getBZeroEntry() const {
89 // Darwin 10 has a __bzero entry point for this purpose.
90 if (getDarwinVers() >= 10)
96 /// getSpecialAddressLatency - For targets where it is beneficial to
97 /// backschedule instructions that compute addresses, return a value
98 /// indicating the number of scheduling cycles of backscheduling that
99 /// should be attempted.
100 unsigned X86Subtarget::getSpecialAddressLatency() const {
101 // For x86 out-of-order targets, back-schedule address computations so
102 // that loads and stores aren't blocked.
103 // This value was chosen arbitrarily.
107 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
108 /// specified arguments. If we can't run cpuid on the host, return true.
109 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
110 unsigned *rECX, unsigned *rEDX) {
111 #if defined(__x86_64__)
112 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
113 asm ("movq\t%%rbx, %%rsi\n\t"
115 "xchgq\t%%rbx, %%rsi\n\t"
122 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
123 #if defined(__GNUC__)
124 asm ("movl\t%%ebx, %%esi\n\t"
126 "xchgl\t%%ebx, %%esi\n\t"
133 #elif defined(_MSC_VER)
138 mov dword ptr [esi],eax
140 mov dword ptr [esi],ebx
142 mov dword ptr [esi],ecx
144 mov dword ptr [esi],edx
152 void X86Subtarget::AutoDetectSubtargetFeatures() {
153 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
159 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
162 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
164 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
165 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
166 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
167 if (ECX & 0x1) X86SSELevel = SSE3;
168 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
169 if ((ECX >> 19) & 0x1) X86SSELevel = SSE41;
170 if ((ECX >> 20) & 0x1) X86SSELevel = SSE42;
172 if (memcmp(text.c, "GenuineIntel", 12) == 0 ||
173 memcmp(text.c, "AuthenticAMD", 12) == 0) {
174 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
175 HasX86_64 = (EDX >> 29) & 0x1;
179 static const char *GetCurrentX86CPU() {
180 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
181 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
183 unsigned Family = (EAX >> 8) & 0xf; // Bits 8 - 11
184 unsigned Model = (EAX >> 4) & 0xf; // Bits 4 - 7
185 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
186 bool Em64T = (EDX >> 29) & 0x1;
193 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
194 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
202 case 4: return "pentium-mmx";
203 default: return "pentium";
207 case 1: return "pentiumpro";
210 case 6: return "pentium2";
214 case 11: return "pentium3";
216 case 13: return "pentium-m";
217 case 14: return "yonah";
218 case 15: return "core2";
219 default: return "i686";
225 return (Em64T) ? "nocona" : "prescott";
227 return (Em64T) ? "x86-64" : "pentium4";
234 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
235 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
236 // appears to be no way to generate the wide variety of AMD-specific targets
237 // from the information returned from CPUID.
245 case 8: return "k6-2";
247 case 13: return "k6-3";
248 default: return "pentium";
252 case 4: return "athlon-tbird";
255 case 8: return "athlon-mp";
256 case 10: return "athlon-xp";
257 default: return "athlon";
261 case 1: return "opteron";
262 case 5: return "athlon-fx"; // also opteron
263 default: return "athlon64";
273 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
274 : AsmFlavor(AsmWriterFlavor)
275 , PICStyle(PICStyles::None)
276 , X86SSELevel(NoMMXSSE)
277 , X863DNowLevel(NoThreeDNow)
282 // FIXME: this is a known good value for Yonah. How about others?
283 , MaxInlineSizeThreshold(128)
285 , TargetType(isELF) { // Default to ELF unless otherwise specified.
287 // Determine default and user specified characteristics
289 // If feature string is not empty, parse features string.
290 std::string CPU = GetCurrentX86CPU();
291 ParseSubtargetFeatures(FS, CPU);
293 // Otherwise, use CPUID to auto-detect feature set.
294 AutoDetectSubtargetFeatures();
297 // If requesting codegen for X86-64, make sure that 64-bit and SSE2 features
298 // are enabled. These are available on all x86-64 CPUs.
301 if (X86SSELevel < SSE2)
305 // Set the boolean corresponding to the current target triple, or the default
306 // if one cannot be determined, to true.
307 const std::string& TT = M.getTargetTriple();
308 if (TT.length() > 5) {
310 if ((Pos = TT.find("-darwin")) != std::string::npos) {
311 TargetType = isDarwin;
313 // Compute the darwin version number.
314 if (isdigit(TT[Pos+7]))
315 DarwinVers = atoi(&TT[Pos+7]);
317 DarwinVers = 8; // Minimum supported darwin is Tiger.
318 } else if (TT.find("linux") != std::string::npos) {
319 // Linux doesn't imply ELF, but we don't currently support anything else.
322 } else if (TT.find("cygwin") != std::string::npos) {
323 TargetType = isCygwin;
324 } else if (TT.find("mingw") != std::string::npos) {
325 TargetType = isMingw;
326 } else if (TT.find("win32") != std::string::npos) {
327 TargetType = isWindows;
328 } else if (TT.find("windows") != std::string::npos) {
329 TargetType = isWindows;
331 } else if (TT.empty()) {
332 #if defined(__CYGWIN__)
333 TargetType = isCygwin;
334 #elif defined(__MINGW32__) || defined(__MINGW64__)
335 TargetType = isMingw;
336 #elif defined(__APPLE__)
337 TargetType = isDarwin;
338 #if __APPLE_CC__ > 5400
339 DarwinVers = 9; // GCC 5400+ is Leopard.
341 DarwinVers = 8; // Minimum supported darwin is Tiger.
344 #elif defined(_WIN32) || defined(_WIN64)
345 TargetType = isWindows;
346 #elif defined(__linux__)
347 // Linux doesn't imply ELF, but we don't currently support anything else.
353 // If the asm syntax hasn't been overridden on the command line, use whatever
355 if (AsmFlavor == X86Subtarget::Unset) {
356 AsmFlavor = (TargetType == isWindows)
357 ? X86Subtarget::Intel : X86Subtarget::ATT;
360 // Stack alignment is 16 bytes on Darwin (both 32 and 64 bit) and for all 64
362 if (TargetType == isDarwin || Is64Bit)
366 stackAlignment = StackAlignment;