1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "X86Subtarget.h"
15 #include "X86GenSubtarget.inc"
16 #include "llvm/Module.h"
17 #include "llvm/Support/CommandLine.h"
18 #include "llvm/Target/TargetMachine.h"
21 cl::opt<X86Subtarget::AsmWriterFlavorTy>
22 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
23 cl::desc("Choose style of code to emit from X86 backend:"),
25 clEnumValN(X86Subtarget::ATT, "att", " Emit AT&T-style assembly"),
26 clEnumValN(X86Subtarget::Intel, "intel", " Emit Intel-style assembly"),
30 /// True if accessing the GV requires an extra load. For Windows, dllimported
31 /// symbols are indirect, loading the value at address GV rather then the
32 /// value of GV itself. This means that the GlobalAddress must be in the base
33 /// or index register of the address, not the GV offset field.
34 bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
35 const TargetMachine& TM,
36 bool isDirectCall) const
39 if (TM.getRelocationModel() != Reloc::Static)
40 if (isTargetDarwin()) {
41 return (!isDirectCall &&
42 (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
43 (GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode())));
44 } else if (TM.getRelocationModel() == Reloc::PIC_ && isPICStyleGOT()) {
45 // Extra load is needed for all non-statics.
46 return (!isDirectCall &&
47 (GV->isDeclaration() || !GV->hasInternalLinkage()));
48 } else if (isTargetCygMing() || isTargetWindows()) {
49 return (GV->hasDLLImportLinkage());
55 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
56 /// specified arguments. If we can't run cpuid on the host, return true.
57 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
58 unsigned *rECX, unsigned *rEDX) {
59 #if defined(__x86_64__)
60 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
61 asm ("movq\t%%rbx, %%rsi\n\t"
63 "xchgq\t%%rbx, %%rsi\n\t"
70 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
72 asm ("movl\t%%ebx, %%esi\n\t"
74 "xchgl\t%%ebx, %%esi\n\t"
81 #elif defined(_MSC_VER)
86 mov dword ptr [esi],eax
88 mov dword ptr [esi],ebx
90 mov dword ptr [esi],ecx
92 mov dword ptr [esi],edx
100 void X86Subtarget::AutoDetectSubtargetFeatures() {
101 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
107 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
110 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
112 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
113 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
114 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
115 if (ECX & 0x1) X86SSELevel = SSE3;
116 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
118 if (memcmp(text.c, "GenuineIntel", 12) == 0 ||
119 memcmp(text.c, "AuthenticAMD", 12) == 0) {
120 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
121 HasX86_64 = (EDX >> 29) & 0x1;
125 static const char *GetCurrentX86CPU() {
126 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
127 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
129 unsigned Family = (EAX >> 8) & 0xf; // Bits 8 - 11
130 unsigned Model = (EAX >> 4) & 0xf; // Bits 4 - 7
131 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
132 bool Em64T = (EDX >> 29) & 0x1;
139 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
140 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
148 case 4: return "pentium-mmx";
149 default: return "pentium";
153 case 1: return "pentiumpro";
156 case 6: return "pentium2";
160 case 11: return "pentium3";
162 case 13: return "pentium-m";
163 case 14: return "yonah";
164 case 15: return "core2";
165 default: return "i686";
171 return (Em64T) ? "nocona" : "prescott";
173 return (Em64T) ? "x86-64" : "pentium4";
180 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
181 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
182 // appears to be no way to generate the wide variety of AMD-specific targets
183 // from the information returned from CPUID.
191 case 8: return "k6-2";
193 case 13: return "k6-3";
194 default: return "pentium";
198 case 4: return "athlon-tbird";
201 case 8: return "athlon-mp";
202 case 10: return "athlon-xp";
203 default: return "athlon";
207 case 1: return "opteron";
208 case 5: return "athlon-fx"; // also opteron
209 default: return "athlon64";
219 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
220 : AsmFlavor(AsmWriterFlavor)
221 , PICStyle(PICStyle::None)
222 , X86SSELevel(NoMMXSSE)
226 // FIXME: this is a known good value for Yonah. How about others?
227 , MaxInlineSizeThreshold(128)
229 , HasLow4GUserAddress(true)
230 , TargetType(isELF) { // Default to ELF unless otherwise specified.
232 // Determine default and user specified characteristics
234 // If feature string is not empty, parse features string.
235 std::string CPU = GetCurrentX86CPU();
236 ParseSubtargetFeatures(FS, CPU);
238 if (Is64Bit && !HasX86_64)
239 cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
241 if (Is64Bit && X86SSELevel < SSE2)
242 cerr << "Warning: 64-bit processors all have at least SSE2.\n";
244 // Otherwise, use CPUID to auto-detect feature set.
245 AutoDetectSubtargetFeatures();
248 // If requesting codegen for X86-64, make sure that 64-bit and SSE2 features
249 // are enabled. These are available on all x86-64 CPUs.
252 if (X86SSELevel < SSE2)
256 // Set the boolean corresponding to the current target triple, or the default
257 // if one cannot be determined, to true.
258 const std::string& TT = M.getTargetTriple();
259 if (TT.length() > 5) {
261 if ((Pos = TT.find("-darwin")) != std::string::npos) {
262 TargetType = isDarwin;
264 // Compute the darwin version number.
265 if (isdigit(TT[Pos+7]))
266 DarwinVers = atoi(&TT[Pos+7]);
268 DarwinVers = 8; // Minimum supported darwin is Tiger.
269 } else if (TT.find("cygwin") != std::string::npos) {
270 TargetType = isCygwin;
271 } else if (TT.find("mingw") != std::string::npos) {
272 TargetType = isMingw;
273 } else if (TT.find("win32") != std::string::npos) {
274 TargetType = isWindows;
276 } else if (TT.empty()) {
277 #if defined(__CYGWIN__)
278 TargetType = isCygwin;
279 #elif defined(__MINGW32__)
280 TargetType = isMingw;
281 #elif defined(__APPLE__)
282 TargetType = isDarwin;
283 #if __APPLE_CC__ > 5400
284 DarwinVers = 9; // GCC 5400+ is Leopard.
286 DarwinVers = 8; // Minimum supported darwin is Tiger.
289 #elif defined(_WIN32)
290 TargetType = isWindows;
294 // If the asm syntax hasn't been overridden on the command line, use whatever
296 if (AsmFlavor == X86Subtarget::Unset) {
297 AsmFlavor = (TargetType == isWindows)
298 ? X86Subtarget::Intel : X86Subtarget::ATT;
301 if (TargetType == isDarwin && Is64Bit)
302 HasLow4GUserAddress = false;
304 if (TargetType == isDarwin ||
305 TargetType == isCygwin ||
306 TargetType == isMingw ||
307 (TargetType == isELF && Is64Bit))