1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "llvm/GlobalValue.h"
18 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/raw_ostream.h"
20 #include "llvm/Support/Host.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/ADT/SmallVector.h"
24 #define GET_SUBTARGETINFO_TARGET_DESC
25 #define GET_SUBTARGETINFO_CTOR
26 #include "X86GenSubtargetInfo.inc"
34 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
35 /// current subtarget according to how we should reference it in a non-pcrel
37 unsigned char X86Subtarget::
38 ClassifyBlockAddressReference() const {
39 if (isPICStyleGOT()) // 32-bit ELF targets.
40 return X86II::MO_GOTOFF;
42 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode.
43 return X86II::MO_PIC_BASE_OFFSET;
45 // Direct static reference to label.
46 return X86II::MO_NO_FLAG;
49 /// ClassifyGlobalReference - Classify a global variable reference for the
50 /// current subtarget according to how we should reference it in a non-pcrel
52 unsigned char X86Subtarget::
53 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
54 // DLLImport only exists on windows, it is implemented as a load from a
56 if (GV->hasDLLImportLinkage())
57 return X86II::MO_DLLIMPORT;
59 // Determine whether this is a reference to a definition or a declaration.
60 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
62 bool isDecl = GV->hasAvailableExternallyLinkage();
63 if (GV->isDeclaration() && !GV->isMaterializable())
66 // X86-64 in PIC mode.
67 if (isPICStyleRIPRel()) {
68 // Large model never uses stubs.
69 if (TM.getCodeModel() == CodeModel::Large)
70 return X86II::MO_NO_FLAG;
72 if (isTargetDarwin()) {
73 // If symbol visibility is hidden, the extra load is not needed if
74 // target is x86-64 or the symbol is definitely defined in the current
76 if (GV->hasDefaultVisibility() &&
77 (isDecl || GV->isWeakForLinker()))
78 return X86II::MO_GOTPCREL;
79 } else if (!isTargetWin64()) {
80 assert(isTargetELF() && "Unknown rip-relative target");
82 // Extra load is needed for all externally visible.
83 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
84 return X86II::MO_GOTPCREL;
87 return X86II::MO_NO_FLAG;
90 if (isPICStyleGOT()) { // 32-bit ELF targets.
91 // Extra load is needed for all externally visible.
92 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
93 return X86II::MO_GOTOFF;
97 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
98 // Determine whether we have a stub reference and/or whether the reference
99 // is relative to the PIC base or not.
101 // If this is a strong reference to a definition, it is definitely not
103 if (!isDecl && !GV->isWeakForLinker())
104 return X86II::MO_PIC_BASE_OFFSET;
106 // Unless we have a symbol with hidden visibility, we have to go through a
107 // normal $non_lazy_ptr stub because this symbol might be resolved late.
108 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
109 return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
111 // If symbol visibility is hidden, we have a stub for common symbol
112 // references and external declarations.
113 if (isDecl || GV->hasCommonLinkage()) {
114 // Hidden $non_lazy_ptr reference.
115 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
118 // Otherwise, no stub.
119 return X86II::MO_PIC_BASE_OFFSET;
122 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
123 // Determine whether we have a stub reference.
125 // If this is a strong reference to a definition, it is definitely not
127 if (!isDecl && !GV->isWeakForLinker())
128 return X86II::MO_NO_FLAG;
130 // Unless we have a symbol with hidden visibility, we have to go through a
131 // normal $non_lazy_ptr stub because this symbol might be resolved late.
132 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
133 return X86II::MO_DARWIN_NONLAZY;
135 // Otherwise, no stub.
136 return X86II::MO_NO_FLAG;
139 // Direct static reference to global.
140 return X86II::MO_NO_FLAG;
144 /// getBZeroEntry - This function returns the name of a function which has an
145 /// interface like the non-standard bzero function, if such a function exists on
146 /// the current subtarget and it is considered prefereable over memset with zero
147 /// passed as the second argument. Otherwise it returns null.
148 const char *X86Subtarget::getBZeroEntry() const {
149 // Darwin 10 has a __bzero entry point for this purpose.
150 if (getTargetTriple().isMacOSX() &&
151 !getTargetTriple().isMacOSXVersionLT(10, 6))
157 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
158 /// to immediate address.
159 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
162 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
165 /// getSpecialAddressLatency - For targets where it is beneficial to
166 /// backschedule instructions that compute addresses, return a value
167 /// indicating the number of scheduling cycles of backscheduling that
168 /// should be attempted.
169 unsigned X86Subtarget::getSpecialAddressLatency() const {
170 // For x86 out-of-order targets, back-schedule address computations so
171 // that loads and stores aren't blocked.
172 // This value was chosen arbitrarily.
176 void X86Subtarget::AutoDetectSubtargetFeatures() {
177 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
183 if (X86_MC::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
186 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
188 if ((EDX >> 15) & 1) HasCMov = true; ToggleFeature(X86::FeatureCMOV);
189 if ((EDX >> 23) & 1) X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX);
190 if ((EDX >> 25) & 1) X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1);
191 if ((EDX >> 26) & 1) X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2);
192 if (ECX & 0x1) X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3);
193 if ((ECX >> 9) & 1) X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);
194 if ((ECX >> 19) & 1) X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);
195 if ((ECX >> 20) & 1) X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);
196 // FIXME: AVX codegen support is not ready.
197 //if ((ECX >> 28) & 1) { HasAVX = true; } ToggleFeature(X86::FeatureAVX);
199 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
200 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
202 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1); ToggleFeature(X86::FeatureCLMUL);
203 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); ToggleFeature(X86::FeatureFMA3);
204 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1); ToggleFeature(X86::FeaturePOPCNT);
205 HasAES = IsIntel && ((ECX >> 25) & 0x1); ToggleFeature(X86::FeatureAES);
206 HasCmpxchg16b = ((ECX >> 13) & 0x1); ToggleFeature(X86::FeatureCMPXCHG16B);
208 if (IsIntel || IsAMD) {
209 // Determine if bit test memory instructions are slow.
212 X86_MC::DetectFamilyModel(EAX, Family, Model);
213 if (IsAMD || (Family == 6 && Model >= 13)) {
215 ToggleFeature(X86::FeatureSlowBTMem);
217 // If it's Nehalem, unaligned memory access is fast.
218 if (Family == 15 && Model == 26) {
220 ToggleFeature(X86::FeatureFastUAMem);
223 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
224 if ((EDX >> 29) & 0x1) {
226 ToggleFeature(X86::Feature64Bit);
228 if (IsAMD && ((ECX >> 6) & 0x1)) {
230 ToggleFeature(X86::FeatureSSE4A);
232 if (IsAMD && ((ECX >> 16) & 0x1)) {
234 ToggleFeature(X86::FeatureFMA4);
239 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
240 const std::string &FS,
241 unsigned StackAlignOverride, bool is64Bit)
242 : X86GenSubtargetInfo(TT, CPU, FS)
243 , PICStyle(PICStyles::None)
244 , X86SSELevel(NoMMXSSE)
245 , X863DNowLevel(NoThreeDNow)
257 , HasVectorUAMem(false)
258 , HasCmpxchg16b(false)
260 // FIXME: this is a known good value for Yonah. How about others?
261 , MaxInlineSizeThreshold(128)
263 , In64BitMode(is64Bit) {
264 // Determine default and user specified characteristics
265 if (!FS.empty() || !CPU.empty()) {
266 std::string CPUName = CPU;
267 if (CPUName.empty()) {
268 #if defined (__x86_64__) || defined(__i386__)
269 CPUName = sys::getHostCPUName();
275 // Make sure 64-bit features are available in 64-bit mode. (But make sure
276 // SSE2 can be turned off explicitly.)
277 std::string FullFS = FS;
280 FullFS = "+64bit,+sse2," + FullFS;
282 FullFS = "+64bit,+sse2";
285 // If feature string is not empty, parse features string.
286 ParseSubtargetFeatures(CPUName, FullFS);
288 // Otherwise, use CPUID to auto-detect feature set.
289 AutoDetectSubtargetFeatures();
291 // Make sure 64-bit features are available in 64-bit mode.
293 HasX86_64 = true; ToggleFeature(X86::Feature64Bit);
294 HasCMov = true; ToggleFeature(X86::FeatureCMOV);
296 if (!HasAVX && X86SSELevel < SSE2) {
298 ToggleFeature(X86::FeatureSSE1);
299 ToggleFeature(X86::FeatureSSE2);
304 // It's important to keep the MCSubtargetInfo feature bits in sync with
305 // target data structure which is shared with MC code emitter, etc.
307 ToggleFeature(X86::Mode64Bit);
310 X86SSELevel = NoMMXSSE;
312 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
313 << ", 3DNowLevel " << X863DNowLevel
314 << ", 64bit " << HasX86_64 << "\n");
315 assert((!In64BitMode || HasX86_64) &&
316 "64-bit code requested on a subtarget that doesn't support it!");
318 // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both
319 // 32 and 64 bit) and for all 64-bit targets.
320 if (StackAlignOverride)
321 stackAlignment = StackAlignOverride;
322 else if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() ||
323 isTargetSolaris() || In64BitMode)