1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "X86GenSubtarget.inc"
18 #include "llvm/Module.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetOptions.h"
29 static cl::opt<X86Subtarget::AsmWriterFlavorTy>
30 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
31 cl::desc("Choose style of code to emit from X86 backend:"),
33 clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
34 clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
38 /// ClassifyGlobalReference - Classify a global variable reference for the
39 /// current subtarget according to how we should reference it in a non-pcrel
41 unsigned char X86Subtarget::
42 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
43 // DLLImport only exists on windows, it is implemented as a load from a
45 if (GV->hasDLLImportLinkage())
46 return X86II::MO_DLLIMPORT;
48 // X86-64 in PIC mode.
49 if (isPICStyleRIPRel()) {
50 // Large model never uses stubs.
51 if (TM.getCodeModel() == CodeModel::Large)
52 return X86II::MO_NO_FLAG;
54 if (isTargetDarwin()) {
55 // If symbol visibility is hidden, the extra load is not needed if
56 // target is x86-64 or the symbol is definitely defined in the current
58 if (GV->hasDefaultVisibility() &&
59 (GV->isDeclaration() || GV->isWeakForLinker()))
60 return X86II::MO_GOTPCREL;
62 assert(isTargetELF() && "Unknown rip-relative target");
64 // Extra load is needed for all externally visible.
65 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
66 return X86II::MO_GOTPCREL;
69 return X86II::MO_NO_FLAG;
72 if (isPICStyleGOT()) { // 32-bit ELF targets.
73 // Extra load is needed for all externally visible.
74 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
75 return X86II::MO_GOTOFF;
79 if (isPICStyleStub()) {
80 // In Darwin/32, we have multiple different stub types, and we have both PIC
81 // and -mdynamic-no-pic. Determine whether we have a stub reference
82 // and/or whether the reference is relative to the PIC base or not.
83 bool IsPIC = TM.getRelocationModel() == Reloc::PIC_;
85 // If this is a strong reference to a definition, it is definitely not
87 if (!GV->isDeclaration() && !GV->isWeakForLinker())
88 return IsPIC ? X86II::MO_PIC_BASE_OFFSET : 0;
90 // Unless we have a symbol with hidden visibility, we have to go through a
91 // normal $non_lazy_ptr stub because this symbol might be resolved late.
92 if (!GV->hasHiddenVisibility()) {
93 // Non-hidden $non_lazy_ptr reference.
94 return IsPIC ? X86II::MO_DARWIN_NONLAZY_PIC_BASE :
95 X86II::MO_DARWIN_NONLAZY;
98 // If symbol visibility is hidden, we have a stub for common symbol
99 // references and external declarations.
100 if (GV->isDeclaration() || GV->hasCommonLinkage()) {
101 // Hidden $non_lazy_ptr reference.
102 return IsPIC ? X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE :
103 X86II::MO_DARWIN_HIDDEN_NONLAZY;
106 // Otherwise, no stub.
107 return IsPIC ? X86II::MO_PIC_BASE_OFFSET : 0;
110 // Direct static reference to global.
111 return X86II::MO_NO_FLAG;
114 /// True if accessing the GV requires an extra load. For Windows, dllimported
115 /// symbols are indirect, loading the value at address GV rather then the
116 /// value of GV itself. This means that the GlobalAddress must be in the base
117 /// or index register of the address, not the GV offset field.
118 bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue *GV,
119 const TargetMachine &TM) const {
120 return isGlobalStubReference(ClassifyGlobalReference(GV, TM));
123 /// True if accessing the GV requires a register. This is a superset of the
124 /// cases where GVRequiresExtraLoad is true. Some variations of PIC require
125 /// a register, but not an extra load.
126 bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
127 const TargetMachine &TM) const {
128 if (GVRequiresExtraLoad(GV, TM))
131 // Code below here need only consider cases where GVRequiresExtraLoad
133 if (TM.getRelocationModel() == Reloc::PIC_)
134 return GV->hasLocalLinkage() || GV->hasExternalLinkage();
138 /// getBZeroEntry - This function returns the name of a function which has an
139 /// interface like the non-standard bzero function, if such a function exists on
140 /// the current subtarget and it is considered prefereable over memset with zero
141 /// passed as the second argument. Otherwise it returns null.
142 const char *X86Subtarget::getBZeroEntry() const {
143 // Darwin 10 has a __bzero entry point for this purpose.
144 if (getDarwinVers() >= 10)
150 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
151 /// to immediate address.
152 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
155 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
158 /// getSpecialAddressLatency - For targets where it is beneficial to
159 /// backschedule instructions that compute addresses, return a value
160 /// indicating the number of scheduling cycles of backscheduling that
161 /// should be attempted.
162 unsigned X86Subtarget::getSpecialAddressLatency() const {
163 // For x86 out-of-order targets, back-schedule address computations so
164 // that loads and stores aren't blocked.
165 // This value was chosen arbitrarily.
169 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
170 /// specified arguments. If we can't run cpuid on the host, return true.
171 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
172 unsigned *rECX, unsigned *rEDX) {
173 #if defined(__x86_64__) || defined(_M_AMD64)
174 #if defined(__GNUC__)
175 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
176 asm ("movq\t%%rbx, %%rsi\n\t"
178 "xchgq\t%%rbx, %%rsi\n\t"
185 #elif defined(_MSC_VER)
187 __cpuid(registers, value);
188 *rEAX = registers[0];
189 *rEBX = registers[1];
190 *rECX = registers[2];
191 *rEDX = registers[3];
194 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
195 #if defined(__GNUC__)
196 asm ("movl\t%%ebx, %%esi\n\t"
198 "xchgl\t%%ebx, %%esi\n\t"
205 #elif defined(_MSC_VER)
210 mov dword ptr [esi],eax
212 mov dword ptr [esi],ebx
214 mov dword ptr [esi],ecx
216 mov dword ptr [esi],edx
224 static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
225 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
226 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
227 if (Family == 6 || Family == 0xf) {
229 // Examine extended family ID if family ID is F.
230 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
231 // Examine extended model ID if family ID is 6 or F.
232 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
236 void X86Subtarget::AutoDetectSubtargetFeatures() {
237 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
243 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
246 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
248 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
249 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
250 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
251 if (ECX & 0x1) X86SSELevel = SSE3;
252 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
253 if ((ECX >> 19) & 0x1) X86SSELevel = SSE41;
254 if ((ECX >> 20) & 0x1) X86SSELevel = SSE42;
256 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
257 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
259 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
260 HasAVX = ((ECX >> 28) & 0x1);
262 if (IsIntel || IsAMD) {
263 // Determine if bit test memory instructions are slow.
266 DetectFamilyModel(EAX, Family, Model);
267 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13);
269 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
270 HasX86_64 = (EDX >> 29) & 0x1;
271 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
272 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1);
276 static const char *GetCurrentX86CPU() {
277 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
278 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
282 DetectFamilyModel(EAX, Family, Model);
284 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
285 bool Em64T = (EDX >> 29) & 0x1;
286 bool HasSSE3 = (ECX & 0x1);
293 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
294 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
302 case 4: return "pentium-mmx";
303 default: return "pentium";
307 case 1: return "pentiumpro";
310 case 6: return "pentium2";
314 case 11: return "pentium3";
316 case 13: return "pentium-m";
317 case 14: return "yonah";
319 case 22: // Celeron M 540
321 case 23: // 45nm: Penryn , Wolfdale, Yorkfield (XE)
323 default: return "i686";
329 case 6: // same as 4, but 65nm
330 return (Em64T) ? "nocona" : "prescott";
336 return (Em64T) ? "x86-64" : "pentium4";
343 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
344 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
345 // appears to be no way to generate the wide variety of AMD-specific targets
346 // from the information returned from CPUID.
354 case 8: return "k6-2";
356 case 13: return "k6-3";
357 default: return "pentium";
361 case 4: return "athlon-tbird";
364 case 8: return "athlon-mp";
365 case 10: return "athlon-xp";
366 default: return "athlon";
371 default: return "k8-sse3";
375 case 1: return "opteron";
376 case 5: return "athlon-fx"; // also opteron
377 default: return "athlon64";
382 default: return "amdfam10";
392 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
393 : AsmFlavor(AsmWriterFlavor)
394 , PICStyle(PICStyles::None)
395 , X86SSELevel(NoMMXSSE)
396 , X863DNowLevel(NoThreeDNow)
406 // FIXME: this is a known good value for Yonah. How about others?
407 , MaxInlineSizeThreshold(128)
409 , TargetType(isELF) { // Default to ELF unless otherwise specified.
411 // default to hard float ABI
412 if (FloatABIType == FloatABI::Default)
413 FloatABIType = FloatABI::Hard;
415 // Determine default and user specified characteristics
417 // If feature string is not empty, parse features string.
418 std::string CPU = GetCurrentX86CPU();
419 ParseSubtargetFeatures(FS, CPU);
420 // All X86-64 CPUs also have SSE2, however user might request no SSE via
421 // -mattr, so don't force SSELevel here.
423 // Otherwise, use CPUID to auto-detect feature set.
424 AutoDetectSubtargetFeatures();
425 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.
426 if (Is64Bit && X86SSELevel < SSE2)
430 // If requesting codegen for X86-64, make sure that 64-bit features
435 DOUT << "Subtarget features: SSELevel " << X86SSELevel
436 << ", 3DNowLevel " << X863DNowLevel
437 << ", 64bit " << HasX86_64 << "\n";
438 assert((!Is64Bit || HasX86_64) &&
439 "64-bit code requested on a subtarget that doesn't support it!");
441 // Set the boolean corresponding to the current target triple, or the default
442 // if one cannot be determined, to true.
443 const std::string& TT = M.getTargetTriple();
444 if (TT.length() > 5) {
446 if ((Pos = TT.find("-darwin")) != std::string::npos) {
447 TargetType = isDarwin;
449 // Compute the darwin version number.
450 if (isdigit(TT[Pos+7]))
451 DarwinVers = atoi(&TT[Pos+7]);
453 DarwinVers = 8; // Minimum supported darwin is Tiger.
454 } else if (TT.find("linux") != std::string::npos) {
455 // Linux doesn't imply ELF, but we don't currently support anything else.
458 } else if (TT.find("cygwin") != std::string::npos) {
459 TargetType = isCygwin;
460 } else if (TT.find("mingw") != std::string::npos) {
461 TargetType = isMingw;
462 } else if (TT.find("win32") != std::string::npos) {
463 TargetType = isWindows;
464 } else if (TT.find("windows") != std::string::npos) {
465 TargetType = isWindows;
467 else if (TT.find("-cl") != std::string::npos) {
468 TargetType = isDarwin;
471 } else if (TT.empty()) {
472 #if defined(__CYGWIN__)
473 TargetType = isCygwin;
474 #elif defined(__MINGW32__) || defined(__MINGW64__)
475 TargetType = isMingw;
476 #elif defined(__APPLE__)
477 TargetType = isDarwin;
478 #if __APPLE_CC__ > 5400
479 DarwinVers = 9; // GCC 5400+ is Leopard.
481 DarwinVers = 8; // Minimum supported darwin is Tiger.
484 #elif defined(_WIN32) || defined(_WIN64)
485 TargetType = isWindows;
486 #elif defined(__linux__)
487 // Linux doesn't imply ELF, but we don't currently support anything else.
493 // If the asm syntax hasn't been overridden on the command line, use whatever
495 if (AsmFlavor == X86Subtarget::Unset) {
496 AsmFlavor = (TargetType == isWindows)
497 ? X86Subtarget::Intel : X86Subtarget::ATT;
500 // Stack alignment is 16 bytes on Darwin (both 32 and 64 bit) and for all 64
502 if (TargetType == isDarwin || Is64Bit)
506 stackAlignment = StackAlignment;