1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Begeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "X86Subtarget.h"
15 #include "llvm/Module.h"
16 #include "X86GenSubtarget.inc"
20 #include "llvm/Support/CommandLine.h"
22 cl::opt<bool> EnableSSE("enable-x86-sse", cl::Hidden,
23 cl::desc("Enable sse on X86"));
26 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
27 /// specified arguments. If we can't run cpuid on the host, return true.
28 static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
29 unsigned *rECX, unsigned *rEDX) {
30 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
32 asm ("pushl\t%%ebx\n\t"
34 "movl\t%%ebx, %%esi\n\t"
42 #elif defined(_MSC_VER)
47 mov dword ptr [esi],eax
49 mov dword ptr [esi],ebx
51 mov dword ptr [esi],ecx
53 mov dword ptr [esi],edx
61 static const char *GetCurrentX86CPU() {
62 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
63 if (GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
65 unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11
66 unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7
67 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
68 bool Em64T = EDX & (1 << 29);
75 GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
76 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
84 case 4: return "pentium-mmx";
85 default: return "pentium";
89 case 1: return "pentiumpro";
92 case 6: return "pentium2";
96 case 11: return "pentium3";
98 case 13: return "pentium-m";
99 case 14: return "yonah";
100 default: return "i686";
106 return (Em64T) ? "nocona" : "prescott";
108 return (Em64T) ? "x86-64" : "pentium4";
115 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
116 // FIXME: fill in remaining family/model combinations
119 return (Em64T) ? "athlon64" : "athlon";
129 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS) {
131 indirectExternAndWeakGlobals = false;
132 X86SSELevel = NoMMXSSE;
133 X863DNowLevel = NoThreeDNow;
136 // Determine default and user specified characteristics
137 std::string CPU = GetCurrentX86CPU();
139 // Parse features string.
140 ParseSubtargetFeatures(FS, CPU);
142 // Default to ELF unless otherwise specified.
145 // FIXME: Force these off until they work. An llc-beta option should turn
148 X86SSELevel = NoMMXSSE;
149 X863DNowLevel = NoThreeDNow;
152 // Set the boolean corresponding to the current target triple, or the default
153 // if one cannot be determined, to true.
154 const std::string& TT = M.getTargetTriple();
155 if (TT.length() > 5) {
156 if (TT.find("cygwin") != std::string::npos ||
157 TT.find("mingw") != std::string::npos)
158 TargetType = isCygwin;
159 else if (TT.find("darwin") != std::string::npos)
160 TargetType = isDarwin;
161 else if (TT.find("win32") != std::string::npos)
162 TargetType = isWindows;
163 } else if (TT.empty()) {
164 #if defined(__CYGWIN__) || defined(__MINGW32__)
165 TargetType = isCygwin;
166 #elif defined(__APPLE__)
167 TargetType = isDarwin;
168 #elif defined(_WIN32)
169 TargetType = isWindows;
173 if (TargetType == isDarwin) {
175 indirectExternAndWeakGlobals = true;