1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Begeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "X86Subtarget.h"
15 #include "X86GenSubtarget.inc"
16 #include "llvm/Module.h"
17 #include "llvm/Support/CommandLine.h"
21 cl::opt<X86Subtarget::AsmWriterFlavorTy>
22 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::unset),
23 cl::desc("Choose style of code to emit from X86 backend:"),
25 clEnumValN(X86Subtarget::att, "att", " Emit AT&T-style assembly"),
26 clEnumValN(X86Subtarget::intel, "intel", " Emit Intel-style assembly"),
29 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
30 /// specified arguments. If we can't run cpuid on the host, return true.
31 static inline bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX,
32 unsigned *rEBX, unsigned *rECX,
34 #if defined(__x86_64__)
35 asm ("pushq\t%%rbx\n\t"
37 "movl\t%%ebx, %%esi\n\t"
45 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
47 asm ("pushl\t%%ebx\n\t"
49 "movl\t%%ebx, %%esi\n\t"
57 #elif defined(_MSC_VER)
62 mov dword ptr [esi],eax
64 mov dword ptr [esi],ebx
66 mov dword ptr [esi],ecx
68 mov dword ptr [esi],edx
76 void X86Subtarget::AutoDetectSubtargetFeatures() {
77 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
83 if (GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
86 // FIXME: support for AMD family of processors.
87 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
88 GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
90 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
91 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
92 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
93 if (ECX & 0x1) X86SSELevel = SSE3;
95 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
96 HasX86_64 = (EDX >> 29) & 0x1;
100 static const char *GetCurrentX86CPU() {
101 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
102 if (GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
104 unsigned Family = (EAX >> 8) & 0xf; // Bits 8 - 11
105 unsigned Model = (EAX >> 4) & 0xf; // Bits 4 - 7
106 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
107 bool Em64T = (EDX >> 29) & 0x1;
114 GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
115 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
123 case 4: return "pentium-mmx";
124 default: return "pentium";
128 case 1: return "pentiumpro";
131 case 6: return "pentium2";
135 case 11: return "pentium3";
137 case 13: return "pentium-m";
138 case 14: return "yonah";
139 case 15: return "core2";
140 default: return "i686";
146 return (Em64T) ? "nocona" : "prescott";
148 return (Em64T) ? "x86-64" : "pentium4";
155 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
156 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
157 // appears to be no way to generate the wide variety of AMD-specific targets
158 // from the information returned from CPUID.
166 case 8: return "k6-2";
168 case 13: return "k6-3";
169 default: return "pentium";
173 case 4: return "athlon-tbird";
176 case 8: return "athlon-mp";
177 case 10: return "athlon-xp";
178 default: return "athlon";
182 case 5: return "athlon-fx"; // also opteron
183 default: return "athlon64";
194 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
195 : AsmFlavor(AsmWriterFlavor)
196 , X86SSELevel(NoMMXSSE)
199 // FIXME: this is a known good value for Yonah. How about others?
200 , MinRepStrSizeThreshold(128)
202 , TargetType(isELF) { // Default to ELF unless otherwise specified.
204 // Determine default and user specified characteristics
206 // If feature string is not empty, parse features string.
207 std::string CPU = GetCurrentX86CPU();
208 ParseSubtargetFeatures(FS, CPU);
210 // Otherwise, use CPUID to auto-detect feature set.
211 AutoDetectSubtargetFeatures();
213 if (Is64Bit && !HasX86_64) {
214 std::cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
219 // Set the boolean corresponding to the current target triple, or the default
220 // if one cannot be determined, to true.
221 const std::string& TT = M.getTargetTriple();
222 if (TT.length() > 5) {
223 if (TT.find("cygwin") != std::string::npos ||
224 TT.find("mingw") != std::string::npos)
225 TargetType = isCygwin;
226 else if (TT.find("darwin") != std::string::npos)
227 TargetType = isDarwin;
228 else if (TT.find("win32") != std::string::npos)
229 TargetType = isWindows;
230 } else if (TT.empty()) {
231 #if defined(__CYGWIN__) || defined(__MINGW32__)
232 TargetType = isCygwin;
233 #elif defined(__APPLE__)
234 TargetType = isDarwin;
235 #elif defined(_WIN32)
236 TargetType = isWindows;
240 // If the asm syntax hasn't been overridden on the command line, use whatever
242 if (AsmFlavor == X86Subtarget::unset) {
243 if (TargetType == isWindows) {
244 AsmFlavor = X86Subtarget::intel;
246 AsmFlavor = X86Subtarget::att;
250 if (TargetType == isDarwin || TargetType == isCygwin)