1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "X86GenSubtarget.inc"
18 #include "llvm/GlobalValue.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Support/Host.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/ADT/SmallVector.h"
30 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
31 /// current subtarget according to how we should reference it in a non-pcrel
33 unsigned char X86Subtarget::
34 ClassifyBlockAddressReference() const {
35 if (isPICStyleGOT()) // 32-bit ELF targets.
36 return X86II::MO_GOTOFF;
38 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode.
39 return X86II::MO_PIC_BASE_OFFSET;
41 // Direct static reference to label.
42 return X86II::MO_NO_FLAG;
45 /// ClassifyGlobalReference - Classify a global variable reference for the
46 /// current subtarget according to how we should reference it in a non-pcrel
48 unsigned char X86Subtarget::
49 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
50 // DLLImport only exists on windows, it is implemented as a load from a
52 if (GV->hasDLLImportLinkage())
53 return X86II::MO_DLLIMPORT;
55 // Determine whether this is a reference to a definition or a declaration.
56 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
58 bool isDecl = GV->hasAvailableExternallyLinkage();
59 if (GV->isDeclaration() && !GV->isMaterializable())
62 // X86-64 in PIC mode.
63 if (isPICStyleRIPRel()) {
64 // Large model never uses stubs.
65 if (TM.getCodeModel() == CodeModel::Large)
66 return X86II::MO_NO_FLAG;
68 if (isTargetDarwin()) {
69 // If symbol visibility is hidden, the extra load is not needed if
70 // target is x86-64 or the symbol is definitely defined in the current
72 if (GV->hasDefaultVisibility() &&
73 (isDecl || GV->isWeakForLinker()))
74 return X86II::MO_GOTPCREL;
75 } else if (!isTargetWin64()) {
76 assert(isTargetELF() && "Unknown rip-relative target");
78 // Extra load is needed for all externally visible.
79 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
80 return X86II::MO_GOTPCREL;
83 return X86II::MO_NO_FLAG;
86 if (isPICStyleGOT()) { // 32-bit ELF targets.
87 // Extra load is needed for all externally visible.
88 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
89 return X86II::MO_GOTOFF;
93 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
94 // Determine whether we have a stub reference and/or whether the reference
95 // is relative to the PIC base or not.
97 // If this is a strong reference to a definition, it is definitely not
99 if (!isDecl && !GV->isWeakForLinker())
100 return X86II::MO_PIC_BASE_OFFSET;
102 // Unless we have a symbol with hidden visibility, we have to go through a
103 // normal $non_lazy_ptr stub because this symbol might be resolved late.
104 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
105 return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
107 // If symbol visibility is hidden, we have a stub for common symbol
108 // references and external declarations.
109 if (isDecl || GV->hasCommonLinkage()) {
110 // Hidden $non_lazy_ptr reference.
111 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
114 // Otherwise, no stub.
115 return X86II::MO_PIC_BASE_OFFSET;
118 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
119 // Determine whether we have a stub reference.
121 // If this is a strong reference to a definition, it is definitely not
123 if (!isDecl && !GV->isWeakForLinker())
124 return X86II::MO_NO_FLAG;
126 // Unless we have a symbol with hidden visibility, we have to go through a
127 // normal $non_lazy_ptr stub because this symbol might be resolved late.
128 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
129 return X86II::MO_DARWIN_NONLAZY;
131 // Otherwise, no stub.
132 return X86II::MO_NO_FLAG;
135 // Direct static reference to global.
136 return X86II::MO_NO_FLAG;
140 /// getBZeroEntry - This function returns the name of a function which has an
141 /// interface like the non-standard bzero function, if such a function exists on
142 /// the current subtarget and it is considered prefereable over memset with zero
143 /// passed as the second argument. Otherwise it returns null.
144 const char *X86Subtarget::getBZeroEntry() const {
145 // Darwin 10 has a __bzero entry point for this purpose.
146 if (getTargetTriple().isMacOSX() &&
147 !getTargetTriple().isMacOSXVersionLT(10, 6))
153 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
154 /// to immediate address.
155 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
158 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
161 /// getSpecialAddressLatency - For targets where it is beneficial to
162 /// backschedule instructions that compute addresses, return a value
163 /// indicating the number of scheduling cycles of backscheduling that
164 /// should be attempted.
165 unsigned X86Subtarget::getSpecialAddressLatency() const {
166 // For x86 out-of-order targets, back-schedule address computations so
167 // that loads and stores aren't blocked.
168 // This value was chosen arbitrarily.
172 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
173 /// specified arguments. If we can't run cpuid on the host, return true.
174 static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX,
175 unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
176 #if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
177 #if defined(__GNUC__)
178 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
179 asm ("movq\t%%rbx, %%rsi\n\t"
181 "xchgq\t%%rbx, %%rsi\n\t"
188 #elif defined(_MSC_VER)
190 __cpuid(registers, value);
191 *rEAX = registers[0];
192 *rEBX = registers[1];
193 *rECX = registers[2];
194 *rEDX = registers[3];
197 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
198 #if defined(__GNUC__)
199 asm ("movl\t%%ebx, %%esi\n\t"
201 "xchgl\t%%ebx, %%esi\n\t"
208 #elif defined(_MSC_VER)
213 mov dword ptr [esi],eax
215 mov dword ptr [esi],ebx
217 mov dword ptr [esi],ecx
219 mov dword ptr [esi],edx
227 static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
228 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
229 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
230 if (Family == 6 || Family == 0xf) {
232 // Examine extended family ID if family ID is F.
233 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
234 // Examine extended model ID if family ID is 6 or F.
235 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
239 void X86Subtarget::AutoDetectSubtargetFeatures() {
240 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
246 if (GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
249 GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
251 if ((EDX >> 15) & 1) HasCMov = true;
252 if ((EDX >> 23) & 1) X86SSELevel = MMX;
253 if ((EDX >> 25) & 1) X86SSELevel = SSE1;
254 if ((EDX >> 26) & 1) X86SSELevel = SSE2;
255 if (ECX & 0x1) X86SSELevel = SSE3;
256 if ((ECX >> 9) & 1) X86SSELevel = SSSE3;
257 if ((ECX >> 19) & 1) X86SSELevel = SSE41;
258 if ((ECX >> 20) & 1) X86SSELevel = SSE42;
259 // FIXME: AVX codegen support is not ready.
260 //if ((ECX >> 28) & 1) { HasAVX = true; X86SSELevel = NoMMXSSE; }
262 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
263 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
265 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1);
266 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
267 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1);
268 HasAES = IsIntel && ((ECX >> 25) & 0x1);
270 if (IsIntel || IsAMD) {
271 // Determine if bit test memory instructions are slow.
274 DetectFamilyModel(EAX, Family, Model);
275 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13);
276 // If it's Nehalem, unaligned memory access is fast.
277 if (Family == 15 && Model == 26)
280 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
281 HasX86_64 = (EDX >> 29) & 0x1;
282 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
283 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1);
287 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
288 bool is64Bit, unsigned StackAlignOverride)
289 : PICStyle(PICStyles::None)
290 , X86SSELevel(NoMMXSSE)
291 , X863DNowLevel(NoThreeDNow)
303 , HasVectorUAMem(false)
305 // FIXME: this is a known good value for Yonah. How about others?
306 , MaxInlineSizeThreshold(128)
310 // Determine default and user specified characteristics
312 // If feature string is not empty, parse features string.
313 std::string CPU = sys::getHostCPUName();
314 ParseSubtargetFeatures(FS, CPU);
315 // All X86-64 CPUs also have SSE2, however user might request no SSE via
316 // -mattr, so don't force SSELevel here.
318 X86SSELevel = NoMMXSSE;
320 // Otherwise, use CPUID to auto-detect feature set.
321 AutoDetectSubtargetFeatures();
322 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.
323 if (Is64Bit && !HasAVX && X86SSELevel < SSE2)
327 // If requesting codegen for X86-64, make sure that 64-bit features
332 // All 64-bit cpus have cmov support.
336 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
337 << ", 3DNowLevel " << X863DNowLevel
338 << ", 64bit " << HasX86_64 << "\n");
339 assert((!Is64Bit || HasX86_64) &&
340 "64-bit code requested on a subtarget that doesn't support it!");
342 // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both
343 // 32 and 64 bit) and for all 64-bit targets.
344 if (StackAlignOverride)
345 stackAlignment = StackAlignOverride;
346 else if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() ||
347 isTargetSolaris() || Is64Bit)