1 //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the X86 specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86SUBTARGET_H
15 #define X86SUBTARGET_H
17 #include "llvm/ADT/Triple.h"
18 #include "llvm/Target/TargetSubtargetInfo.h"
19 #include "llvm/CallingConv.h"
22 #define GET_SUBTARGETINFO_HEADER
23 #include "X86GenSubtargetInfo.inc"
30 /// PICStyles - The X86 backend supports a number of different styles of PIC.
34 StubPIC, // Used on i386-darwin in -fPIC mode.
35 StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
36 GOT, // Used on many 32-bit unices in -fPIC mode.
37 RIPRel, // Used on X86-64 when not in -static mode.
38 None // Set when in -static mode (not PIC or DynamicNoPIC mode).
42 class X86Subtarget : public X86GenSubtargetInfo {
45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
49 NoThreeDNow, ThreeDNow, ThreeDNowA
52 /// PICStyle - Which PIC style to use
54 PICStyles::Style PICStyle;
56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
58 X86SSEEnum X86SSELevel;
60 /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
62 X863DNowEnum X863DNowLevel;
64 /// HasCMov - True if this processor has conditional move instructions
65 /// (generally pentium pro+).
68 /// HasX86_64 - True if the processor supports X86-64 instructions.
72 /// HasPOPCNT - True if the processor supports POPCNT.
75 /// HasSSE4A - True if the processor supports SSE4A instructions.
78 /// HasAVX - Target has AVX instructions
81 /// HasAVX2 - Target has AVX2 instructions
84 /// HasAES - Target has AES instructions
87 /// HasCLMUL - Target has carry-less multiplication
90 /// HasFMA3 - Target has 3-operand fused multiply-add
93 /// HasFMA4 - Target has 4-operand fused multiply-add
96 /// HasXOP - Target has XOP instructions
99 /// HasMOVBE - True if the processor has the MOVBE instruction.
102 /// HasRDRAND - True if the processor has the RDRAND instruction.
105 /// HasF16C - Processor has 16-bit floating point conversion instructions.
108 /// HasFSGSBase - Processor has FS/GS base insturctions.
111 /// HasLZCNT - Processor has LZCNT instruction.
114 /// HasBMI - Processor has BMI1 instructions.
117 /// HasBMI2 - Processor has BMI2 instructions.
120 /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
123 /// IsUAMemFast - True if unaligned memory access is fast.
126 /// HasVectorUAMem - True if SIMD operations can have unaligned memory
127 /// operands. This may require setting a feature bit in the processor.
130 /// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction;
131 /// this is true for most x86-64 chips, but not the first AMD chips.
134 /// stackAlignment - The minimum alignment known to hold of the stack frame on
135 /// entry to the function and which must be maintained by every function.
136 unsigned stackAlignment;
138 /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
140 unsigned MaxInlineSizeThreshold;
142 /// TargetTriple - What processor and OS we're targeting.
146 /// In64BitMode - True if compiling for 64-bit, false for 32-bit.
151 /// This constructor initializes the data members to match that
152 /// of the specified triple.
154 X86Subtarget(const std::string &TT, const std::string &CPU,
155 const std::string &FS,
156 unsigned StackAlignOverride, bool is64Bit);
158 /// getStackAlignment - Returns the minimum alignment known to hold of the
159 /// stack frame on entry to the function and which must be maintained by every
160 /// function for this subtarget.
161 unsigned getStackAlignment() const { return stackAlignment; }
163 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
164 /// that still makes it profitable to inline the call.
165 unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
167 /// ParseSubtargetFeatures - Parses features string setting specified
168 /// subtarget options. Definition of function is auto generated by tblgen.
169 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
171 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
173 void AutoDetectSubtargetFeatures();
175 bool is64Bit() const { return In64BitMode; }
177 PICStyles::Style getPICStyle() const { return PICStyle; }
178 void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
180 bool hasCMov() const { return HasCMov; }
181 bool hasMMX() const { return X86SSELevel >= MMX; }
182 bool hasSSE1() const { return X86SSELevel >= SSE1; }
183 bool hasSSE2() const { return X86SSELevel >= SSE2; }
184 bool hasSSE3() const { return X86SSELevel >= SSE3; }
185 bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
186 bool hasSSE41() const { return X86SSELevel >= SSE41; }
187 bool hasSSE42() const { return X86SSELevel >= SSE42; }
188 bool hasSSE4A() const { return HasSSE4A; }
189 bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
190 bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
191 bool hasPOPCNT() const { return HasPOPCNT; }
192 bool hasAVX() const { return HasAVX; }
193 bool hasAVX2() const { return HasAVX2; }
194 bool hasXMM() const { return hasSSE1() || hasAVX(); }
195 bool hasXMMInt() const { return hasSSE2() || hasAVX(); }
196 bool hasSSE1orAVX() const { return hasSSE1() || hasAVX(); }
197 bool hasSSE3orAVX() const { return hasSSE3() || hasAVX(); }
198 bool hasSSSE3orAVX() const { return hasSSSE3() || hasAVX(); }
199 bool hasSSE41orAVX() const { return hasSSE41() || hasAVX(); }
200 bool hasSSE42orAVX() const { return hasSSE42() || hasAVX(); }
201 bool hasAES() const { return HasAES; }
202 bool hasCLMUL() const { return HasCLMUL; }
203 bool hasFMA3() const { return HasFMA3; }
204 bool hasFMA4() const { return HasFMA4; }
205 bool hasXOP() const { return HasXOP; }
206 bool hasMOVBE() const { return HasMOVBE; }
207 bool hasRDRAND() const { return HasRDRAND; }
208 bool hasF16C() const { return HasF16C; }
209 bool hasFSGSBase() const { return HasFSGSBase; }
210 bool hasLZCNT() const { return HasLZCNT; }
211 bool hasBMI() const { return HasBMI; }
212 bool hasBMI2() const { return HasBMI2; }
213 bool isBTMemSlow() const { return IsBTMemSlow; }
214 bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
215 bool hasVectorUAMem() const { return HasVectorUAMem; }
216 bool hasCmpxchg16b() const { return HasCmpxchg16b; }
218 const Triple &getTargetTriple() const { return TargetTriple; }
220 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
221 bool isTargetFreeBSD() const {
222 return TargetTriple.getOS() == Triple::FreeBSD;
224 bool isTargetSolaris() const {
225 return TargetTriple.getOS() == Triple::Solaris;
228 // ELF is a reasonably sane default and the only other X86 targets we
229 // support are Darwin and Windows. Just use "not those".
230 bool isTargetELF() const {
231 return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
233 bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
234 bool isTargetNaCl() const {
235 return TargetTriple.getOS() == Triple::NativeClient;
237 bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); }
238 bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); }
240 bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
241 bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
242 bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
243 bool isTargetCygMing() const {
244 return isTargetMingw() || isTargetCygwin();
247 /// isTargetCOFF - Return true if this is any COFF/Windows target variant.
248 bool isTargetCOFF() const {
249 return isTargetMingw() || isTargetCygwin() || isTargetWindows();
252 bool isTargetWin64() const {
253 // FIXME: x86_64-cygwin has not been released yet.
254 return In64BitMode && (isTargetCygMing() || isTargetWindows());
257 bool isTargetEnvMacho() const {
258 return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO);
261 bool isTargetWin32() const {
262 return !In64BitMode && (isTargetMingw() || isTargetWindows());
265 bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
266 bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
267 bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
269 bool isPICStyleStubPIC() const {
270 return PICStyle == PICStyles::StubPIC;
273 bool isPICStyleStubNoDynamic() const {
274 return PICStyle == PICStyles::StubDynamicNoPIC;
276 bool isPICStyleStubAny() const {
277 return PICStyle == PICStyles::StubDynamicNoPIC ||
278 PICStyle == PICStyles::StubPIC; }
280 /// ClassifyGlobalReference - Classify a global variable reference for the
281 /// current subtarget according to how we should reference it in a non-pcrel
283 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
284 const TargetMachine &TM)const;
286 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
287 /// current subtarget according to how we should reference it in a non-pcrel
289 unsigned char ClassifyBlockAddressReference() const;
291 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
292 /// to immediate address.
293 bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
295 /// This function returns the name of a function which has an interface
296 /// like the non-standard bzero function, if such a function exists on
297 /// the current subtarget and it is considered prefereable over
298 /// memset with zero passed as the second argument. Otherwise it
300 const char *getBZeroEntry() const;
302 /// getSpecialAddressLatency - For targets where it is beneficial to
303 /// backschedule instructions that compute addresses, return a value
304 /// indicating the number of scheduling cycles of backscheduling that
305 /// should be attempted.
306 unsigned getSpecialAddressLatency() const;
309 } // End llvm namespace