1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // This file defines the X86 specific subclass of TargetMachine.
5 //===----------------------------------------------------------------------===//
7 #include "X86TargetMachine.h"
9 #include "llvm/PassManager.h"
10 #include "llvm/Target/TargetMachineImpls.h"
11 #include "llvm/CodeGen/MachineFunction.h"
12 #include "llvm/CodeGen/Passes.h"
13 #include "llvm/Transforms/Scalar.h"
14 #include "Support/CommandLine.h"
15 #include "Support/Statistic.h"
19 cl::opt<bool> NoLocalRA("disable-local-ra",
20 cl::desc("Use Simple RA instead of Local RegAlloc"));
21 cl::opt<bool> PrintCode("print-machineinstrs",
22 cl::desc("Print generated machine code"));
23 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
24 cl::desc("Use the 'simple' X86 instruction selector"));
27 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
28 // that implements the X86 backend.
30 TargetMachine *allocateX86TargetMachine(unsigned Configuration) {
31 return new X86TargetMachine(Configuration);
35 /// X86TargetMachine ctor - Create an ILP32 architecture model
37 X86TargetMachine::X86TargetMachine(unsigned Config)
38 : TargetMachine("X86",
39 (Config & TM::EndianMask) == TM::LittleEndian,
40 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4,
41 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4,
42 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4),
43 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
47 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT
48 // does to emit statically compiled machine code.
49 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
51 addPassesToJITCompile(PM);
52 PM.add(createX86CodePrinterPass(Out, *this));
53 return false; // success!
56 /// addPassesToJITCompile - Add passes to the specified pass manager to
57 /// implement a fast dynamic compiler for this target. Return true if this is
58 /// not supported for this target.
60 bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) {
61 // FIXME: Implement the switch instruction in the instruction selector!
62 PM.add(createLowerSwitchPass());
65 PM.add(createX86SimpleInstructionSelector(*this));
67 PM.add(createX86PatternInstructionSelector(*this));
69 // TODO: optional optimizations go here
71 // FIXME: Add SSA based peephole optimizer here.
73 // Print the instruction selected machine code...
75 PM.add(createMachineFunctionPrinterPass());
77 // Perform register allocation to convert to a concrete x86 representation
79 PM.add(createSimpleRegisterAllocator());
81 PM.add(createLocalRegisterAllocator());
84 PM.add(createMachineFunctionPrinterPass());
86 PM.add(createX86FloatingPointStackifierPass());
89 PM.add(createMachineFunctionPrinterPass());
91 // Insert prolog/epilog code. Eliminate abstract frame index references...
92 PM.add(createPrologEpilogCodeInserter());
94 PM.add(createX86PeepholeOptimizerPass());
96 if (PrintCode) // Print the register-allocated code
97 PM.add(createX86CodePrinterPass(std::cerr, *this));
98 return false; // success!