1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/IntrinsicLowering.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/ADT/Statistic.h"
29 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
30 /// in a library unless there are references into the library. In particular,
31 /// it seems that it is not possible to get things to work on Win32 without
32 /// this. Though it is unused, do not remove it.
33 extern "C" int X86TargetMachineModule;
34 int X86TargetMachineModule = 0;
37 cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
38 cl::desc("Disable the X86 asm printer, for use "
39 "when profiling the code generator."));
41 cl::opt<bool> EnableX86LSR("enable-x86-lsr", cl::Hidden,
42 cl::desc("Enable the X86 loop strength reduction "
44 // Register the target.
45 RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
48 unsigned X86TargetMachine::getJITMatchQuality() {
49 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
56 unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) {
57 // We strongly match "i[3-9]86-*".
58 std::string TT = M.getTargetTriple();
59 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
60 TT[4] == '-' && TT[1] - '3' < 6)
63 if (M.getEndianness() == Module::LittleEndian &&
64 M.getPointerSize() == Module::Pointer32)
65 return 10; // Weak match
66 else if (M.getEndianness() != Module::AnyEndianness ||
67 M.getPointerSize() != Module::AnyPointerSize)
68 return 0; // Match for some other target
70 return getJITMatchQuality()/2;
73 /// X86TargetMachine ctor - Create an ILP32 architecture model
75 X86TargetMachine::X86TargetMachine(const Module &M,
76 IntrinsicLowering *IL,
77 const std::string &FS)
78 : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
80 FrameInfo(TargetFrameInfo::StackGrowsDown,
81 Subtarget.getStackAlignment(), -4),
82 JITInfo(*this), TLInfo(*this) {
83 if (getRelocationModel() == Reloc::Default)
84 if (Subtarget.isTargetDarwin())
85 setRelocationModel(Reloc::DynamicNoPIC);
87 setRelocationModel(Reloc::PIC);
91 // addPassesToEmitFile - We currently use all of the same passes as the JIT
92 // does to emit statically compiled machine code.
93 bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
94 CodeGenFileType FileType,
96 if (FileType != TargetMachine::AssemblyFile &&
97 FileType != TargetMachine::ObjectFile) return true;
99 // Run loop strength reduction before anything else.
100 if (EnableX86LSR) PM.add(createLoopStrengthReducePass(&TLInfo));
102 // FIXME: Implement efficient support for garbage collection intrinsics.
103 PM.add(createLowerGCPass());
105 // FIXME: Implement the invoke/unwind instructions!
106 PM.add(createLowerInvokePass());
108 // FIXME: Implement the switch instruction in the instruction selector!
109 PM.add(createLowerSwitchPass());
111 // Make sure that no unreachable blocks are instruction selected.
112 PM.add(createUnreachableBlockEliminationPass());
114 // Install an instruction selector.
115 PM.add(createX86ISelDag(*this));
117 // Print the instruction selected machine code...
118 if (PrintMachineCode)
119 PM.add(createMachineFunctionPrinterPass(&std::cerr));
121 // Perform register allocation to convert to a concrete x86 representation
122 PM.add(createRegisterAllocator());
124 if (PrintMachineCode)
125 PM.add(createMachineFunctionPrinterPass(&std::cerr));
127 PM.add(createX86FloatingPointStackifierPass());
129 if (PrintMachineCode)
130 PM.add(createMachineFunctionPrinterPass(&std::cerr));
132 // Insert prolog/epilog code. Eliminate abstract frame index references...
133 PM.add(createPrologEpilogCodeInserter());
135 if (PrintMachineCode) // Print the register-allocated code
136 PM.add(createX86CodePrinterPass(std::cerr, *this));
141 assert(0 && "Unexpected filetype here!");
142 case TargetMachine::AssemblyFile:
143 PM.add(createX86CodePrinterPass(Out, *this));
145 case TargetMachine::ObjectFile:
146 // FIXME: We only support emission of ELF files for now, this should check
147 // the target triple and decide on the format to write (e.g. COFF on
149 addX86ELFObjectWriterPass(PM, Out, *this);
153 // Delete machine code for this function
154 PM.add(createMachineCodeDeleter());
156 return false; // success!
159 /// addPassesToJITCompile - Add passes to the specified pass manager to
160 /// implement a fast dynamic compiler for this target. Return true if this is
161 /// not supported for this target.
163 void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
164 // The JIT should use static relocation model.
165 TM.setRelocationModel(Reloc::Static);
167 // Run loop strength reduction before anything else.
169 PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
171 // FIXME: Implement efficient support for garbage collection intrinsics.
172 PM.add(createLowerGCPass());
174 // FIXME: Implement the invoke/unwind instructions!
175 PM.add(createLowerInvokePass());
177 // FIXME: Implement the switch instruction in the instruction selector!
178 PM.add(createLowerSwitchPass());
180 // Make sure that no unreachable blocks are instruction selected.
181 PM.add(createUnreachableBlockEliminationPass());
183 // Install an instruction selector.
184 PM.add(createX86ISelDag(TM));
186 // Print the instruction selected machine code...
187 if (PrintMachineCode)
188 PM.add(createMachineFunctionPrinterPass(&std::cerr));
190 // Perform register allocation to convert to a concrete x86 representation
191 PM.add(createRegisterAllocator());
193 if (PrintMachineCode)
194 PM.add(createMachineFunctionPrinterPass(&std::cerr));
196 PM.add(createX86FloatingPointStackifierPass());
198 if (PrintMachineCode)
199 PM.add(createMachineFunctionPrinterPass(&std::cerr));
201 // Insert prolog/epilog code. Eliminate abstract frame index references...
202 PM.add(createPrologEpilogCodeInserter());
204 if (PrintMachineCode) // Print the register-allocated code
205 PM.add(createX86CodePrinterPass(std::cerr, TM));
208 bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
209 MachineCodeEmitter &MCE) {
210 PM.add(createX86CodeEmitterPass(MCE));
211 // Delete machine code for this function
212 PM.add(createMachineCodeDeleter());