1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/IntrinsicLowering.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/ADT/Statistic.h"
29 bool llvm::X86PatIsel = true;
31 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
32 /// in a library unless there are references into the library. In particular,
33 /// it seems that it is not possible to get things to work on Win32 without
34 /// this. Though it is unused, do not remove it.
35 extern "C" int X86TargetMachineModule;
36 int X86TargetMachineModule = 0;
39 cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
40 cl::desc("Disable the X86 asm printer, for use "
41 "when profiling the code generator."));
42 cl::opt<bool, true> EnableX86PatISel("enable-x86-pattern-isel", cl::Hidden,
43 cl::desc("Enable the pattern based isel for X86"),
44 cl::location(X86PatIsel),
47 // Register the target.
48 RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
51 unsigned X86TargetMachine::getJITMatchQuality() {
52 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
59 unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) {
60 // We strongly match "i[3-9]86-*".
61 std::string TT = M.getTargetTriple();
62 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
63 TT[4] == '-' && TT[1] - '3' < 6)
66 if (M.getEndianness() == Module::LittleEndian &&
67 M.getPointerSize() == Module::Pointer32)
68 return 10; // Weak match
69 else if (M.getEndianness() != Module::AnyEndianness ||
70 M.getPointerSize() != Module::AnyPointerSize)
71 return 0; // Match for some other target
73 return getJITMatchQuality()/2;
76 /// X86TargetMachine ctor - Create an ILP32 architecture model
78 X86TargetMachine::X86TargetMachine(const Module &M,
79 IntrinsicLowering *IL,
80 const std::string &FS)
81 : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
83 FrameInfo(TargetFrameInfo::StackGrowsDown,
84 Subtarget.getStackAlignment(), -4),
88 // addPassesToEmitFile - We currently use all of the same passes as the JIT
89 // does to emit statically compiled machine code.
90 bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
91 CodeGenFileType FileType,
93 if (FileType != TargetMachine::AssemblyFile &&
94 FileType != TargetMachine::ObjectFile) return true;
96 // FIXME: Implement efficient support for garbage collection intrinsics.
97 PM.add(createLowerGCPass());
99 // FIXME: Implement the invoke/unwind instructions!
100 PM.add(createLowerInvokePass());
102 // FIXME: Implement the switch instruction in the instruction selector!
103 PM.add(createLowerSwitchPass());
105 // Make sure that no unreachable blocks are instruction selected.
106 PM.add(createUnreachableBlockEliminationPass());
108 // Install an instruction selector.
110 PM.add(createX86ISelPattern(*this));
112 PM.add(createX86ISelDag(*this));
114 // Print the instruction selected machine code...
115 if (PrintMachineCode)
116 PM.add(createMachineFunctionPrinterPass(&std::cerr));
118 // Perform register allocation to convert to a concrete x86 representation
119 PM.add(createRegisterAllocator());
121 if (PrintMachineCode)
122 PM.add(createMachineFunctionPrinterPass(&std::cerr));
124 PM.add(createX86FloatingPointStackifierPass());
126 if (PrintMachineCode)
127 PM.add(createMachineFunctionPrinterPass(&std::cerr));
129 // Insert prolog/epilog code. Eliminate abstract frame index references...
130 PM.add(createPrologEpilogCodeInserter());
132 PM.add(createX86PeepholeOptimizerPass());
134 if (PrintMachineCode) // Print the register-allocated code
135 PM.add(createX86CodePrinterPass(std::cerr, *this));
140 assert(0 && "Unexpected filetype here!");
141 case TargetMachine::AssemblyFile:
142 PM.add(createX86CodePrinterPass(Out, *this));
144 case TargetMachine::ObjectFile:
145 // FIXME: We only support emission of ELF files for now, this should check
146 // the target triple and decide on the format to write (e.g. COFF on
148 addX86ELFObjectWriterPass(PM, Out, *this);
152 // Delete machine code for this function
153 PM.add(createMachineCodeDeleter());
155 return false; // success!
158 /// addPassesToJITCompile - Add passes to the specified pass manager to
159 /// implement a fast dynamic compiler for this target. Return true if this is
160 /// not supported for this target.
162 void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
163 // FIXME: Implement efficient support for garbage collection intrinsics.
164 PM.add(createLowerGCPass());
166 // FIXME: Implement the invoke/unwind instructions!
167 PM.add(createLowerInvokePass());
169 // FIXME: Implement the switch instruction in the instruction selector!
170 PM.add(createLowerSwitchPass());
172 // Make sure that no unreachable blocks are instruction selected.
173 PM.add(createUnreachableBlockEliminationPass());
175 // Install an instruction selector.
177 PM.add(createX86ISelPattern(TM));
179 PM.add(createX86ISelDag(TM));
181 // FIXME: Add SSA based peephole optimizer here.
183 // Print the instruction selected machine code...
184 if (PrintMachineCode)
185 PM.add(createMachineFunctionPrinterPass(&std::cerr));
187 // Perform register allocation to convert to a concrete x86 representation
188 PM.add(createRegisterAllocator());
190 if (PrintMachineCode)
191 PM.add(createMachineFunctionPrinterPass(&std::cerr));
193 PM.add(createX86FloatingPointStackifierPass());
195 if (PrintMachineCode)
196 PM.add(createMachineFunctionPrinterPass(&std::cerr));
198 // Insert prolog/epilog code. Eliminate abstract frame index references...
199 PM.add(createPrologEpilogCodeInserter());
201 PM.add(createX86PeepholeOptimizerPass());
203 if (PrintMachineCode) // Print the register-allocated code
204 PM.add(createX86CodePrinterPass(std::cerr, TM));
207 bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
208 MachineCodeEmitter &MCE) {
209 PM.add(createX86CodeEmitterPass(MCE));
210 // Delete machine code for this function
211 PM.add(createMachineCodeDeleter());