1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/MC/MCCodeEmitter.h"
20 #include "llvm/MC/MCStreamer.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Target/TargetOptions.h"
23 #include "llvm/Target/TargetRegistry.h"
26 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
27 MCContext &Ctx, TargetAsmBackend &TAB,
29 MCCodeEmitter *_Emitter,
34 if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
35 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
37 if (TheTriple.isOSWindows())
38 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
40 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack);
43 extern "C" void LLVMInitializeX86Target() {
44 // Register the target.
45 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
46 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
48 // Register the code emitter.
49 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
50 createX86MCCodeEmitter);
51 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
52 createX86MCCodeEmitter);
54 // Register the asm backend.
55 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
56 createX86_32AsmBackend);
57 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
58 createX86_64AsmBackend);
60 // Register the object streamer.
61 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
63 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
68 X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT,
69 StringRef CPU, StringRef FS,
71 : X86TargetMachine(T, TT, CPU, FS, RM, false),
72 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
73 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
74 (getSubtargetImpl()->isTargetCygMing() ||
75 getSubtargetImpl()->isTargetWindows()) ?
76 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-n8:16:32" :
77 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-n8:16:32"),
85 X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT,
86 StringRef CPU, StringRef FS,
88 : X86TargetMachine(T, TT, CPU, FS, RM, true),
89 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
96 /// X86TargetMachine ctor - Create an X86 target.
98 X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT,
99 StringRef CPU, StringRef FS,
100 Reloc::Model RM, bool is64Bit)
101 : LLVMTargetMachine(T, TT, CPU, FS, RM),
102 Subtarget(TT, CPU, FS, StackAlignmentOverride, is64Bit),
103 FrameLowering(*this, Subtarget),
104 ELFWriterInfo(is64Bit, true) {
105 // Determine the PICStyle based on the target selected.
106 if (getRelocationModel() == Reloc::Static) {
107 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
108 Subtarget.setPICStyle(PICStyles::None);
109 } else if (Subtarget.is64Bit()) {
110 // PIC in 64 bit mode is always rip-rel.
111 Subtarget.setPICStyle(PICStyles::RIPRel);
112 } else if (Subtarget.isTargetCygMing()) {
113 Subtarget.setPICStyle(PICStyles::None);
114 } else if (Subtarget.isTargetDarwin()) {
115 if (getRelocationModel() == Reloc::PIC_)
116 Subtarget.setPICStyle(PICStyles::StubPIC);
118 assert(getRelocationModel() == Reloc::DynamicNoPIC);
119 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
121 } else if (Subtarget.isTargetELF()) {
122 Subtarget.setPICStyle(PICStyles::GOT);
125 // default to hard float ABI
126 if (FloatABIType == FloatABI::Default)
127 FloatABIType = FloatABI::Hard;
130 //===----------------------------------------------------------------------===//
131 // Pass Pipeline Configuration
132 //===----------------------------------------------------------------------===//
134 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
135 CodeGenOpt::Level OptLevel) {
136 // Install an instruction selector.
137 PM.add(createX86ISelDag(*this, OptLevel));
139 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
140 if (!Subtarget.is64Bit())
141 PM.add(createGlobalBaseRegPass());
146 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
147 CodeGenOpt::Level OptLevel) {
148 PM.add(createX86MaxStackAlignmentHeuristicPass());
149 return false; // -print-machineinstr shouldn't print after this.
152 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
153 CodeGenOpt::Level OptLevel) {
154 PM.add(createX86FloatingPointStackifierPass());
155 return true; // -print-machineinstr should print after this.
158 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
159 CodeGenOpt::Level OptLevel) {
160 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
161 PM.add(createSSEDomainFixPass());
167 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
168 CodeGenOpt::Level OptLevel,
169 JITCodeEmitter &JCE) {
170 PM.add(createX86JITCodeEmitterPass(*this, JCE));
175 void X86TargetMachine::setCodeModelForStatic() {
177 if (getCodeModel() != CodeModel::Default) return;
179 // For static codegen, if we're not already set, use Small codegen.
180 setCodeModel(CodeModel::Small);
184 void X86TargetMachine::setCodeModelForJIT() {
186 if (getCodeModel() != CodeModel::Default) return;
188 // 64-bit JIT places everything in the same buffer except external functions.
189 if (Subtarget.is64Bit())
190 setCodeModel(CodeModel::Large);
192 setCodeModel(CodeModel::Small);