1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
26 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
27 /// in a library unless there are references into the library. In particular,
28 /// it seems that it is not possible to get things to work on Win32 without
29 /// this. Though it is unused, do not remove it.
30 extern "C" int X86TargetMachineModule;
31 int X86TargetMachineModule = 0;
34 // Register the target.
35 RegisterTarget<X86_32TargetMachine>
36 X("x86", " 32-bit X86: Pentium-Pro and above");
37 RegisterTarget<X86_64TargetMachine>
38 Y("x86-64", " 64-bit X86: EM64T and AMD64");
41 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
42 return new X86TargetAsmInfo(*this);
45 unsigned X86_32TargetMachine::getJITMatchQuality() {
46 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
52 unsigned X86_64TargetMachine::getJITMatchQuality() {
53 #if defined(__x86_64__)
59 unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
60 // We strongly match "i[3-9]86-*".
61 std::string TT = M.getTargetTriple();
62 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
63 TT[4] == '-' && TT[1] - '3' < 6)
66 if (M.getEndianness() == Module::LittleEndian &&
67 M.getPointerSize() == Module::Pointer32)
68 return 10; // Weak match
69 else if (M.getEndianness() != Module::AnyEndianness ||
70 M.getPointerSize() != Module::AnyPointerSize)
71 return 0; // Match for some other target
73 return getJITMatchQuality()/2;
76 unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
77 // We strongly match "x86_64-*".
78 std::string TT = M.getTargetTriple();
79 if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
80 TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
83 if (M.getEndianness() == Module::LittleEndian &&
84 M.getPointerSize() == Module::Pointer64)
85 return 10; // Weak match
86 else if (M.getEndianness() != Module::AnyEndianness ||
87 M.getPointerSize() != Module::AnyPointerSize)
88 return 0; // Match for some other target
90 return getJITMatchQuality()/2;
93 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
94 : X86TargetMachine(M, FS, false) {
98 X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
99 : X86TargetMachine(M, FS, true) {
102 /// X86TargetMachine ctor - Create an ILP32 architecture model
104 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, bool is64Bit)
105 : Subtarget(M, FS, is64Bit),
106 DataLayout(Subtarget.is64Bit() ?
107 std::string("e-p:64:64-d:32-l:32") :
108 std::string("e-p:32:32-d:32-l:32")),
109 FrameInfo(TargetFrameInfo::StackGrowsDown,
110 Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
111 InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
112 if (getRelocationModel() == Reloc::Default)
113 if (Subtarget.isTargetDarwin())
114 setRelocationModel(Reloc::DynamicNoPIC);
116 setRelocationModel(Reloc::PIC_);
117 if (Subtarget.is64Bit()) {
118 // No DynamicNoPIC support under X86-64.
119 if (getRelocationModel() == Reloc::DynamicNoPIC)
120 setRelocationModel(Reloc::PIC_);
121 // Default X86-64 code model is small.
122 if (getCodeModel() == CodeModel::Default)
123 setCodeModel(CodeModel::Small);
127 //===----------------------------------------------------------------------===//
128 // Pass Pipeline Configuration
129 //===----------------------------------------------------------------------===//
131 bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
132 // Install an instruction selector.
133 PM.add(createX86ISelDag(*this, Fast));
137 bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
138 PM.add(createX86FloatingPointStackifierPass());
139 return true; // -print-machineinstr should print after this.
142 bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
144 PM.add(createX86CodePrinterPass(Out, *this));
148 bool X86TargetMachine::addObjectWriter(FunctionPassManager &PM, bool Fast,
150 if (Subtarget.isTargetELF()) {
151 addX86ELFObjectWriterPass(PM, Out, *this);
157 bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
158 MachineCodeEmitter &MCE) {
159 // FIXME: Move this to TargetJITInfo!
160 setRelocationModel(Reloc::Static);
162 PM.add(createX86CodeEmitterPass(*this, MCE));